• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.6
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• pp.350-355
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• 2014

Bottom-gate tin oxide ($SnO_2$) thin film transistors (TFTs) were fabricated on $N^+$ Si wafers used as gate electrodes. 60-nm-thick $SnO_2$ thin films acting as active layers were sputtered on $SiO_2/Al_2O_3$ films. The $SiO_2/Al_2O_3$ films deposited on the Si wafers were employed for gate dielectrics. In order to increase the resistivity of the $SnO_2$ thin films, oxygen mixed with argon was introduced into the chamber during the sputtering. The mobility of $SnO_2$ TFTs was measured as a function of the flow ratio of oxygen to argon ($O_2/Ar$). The mobility variation with $O_2/Ar$ was analyzed through studies on crystallinity, oxygen binding state, optical properties. X-ray diffraction (XRD) and XPS (X-ray photoelectron spectroscopy) were carried out to observe the crystallinity and oxygen binding state of $SnO_2$ films. The mobility decreased with increasing $O_2/Ar$. It was found that the decrease of the mobility is mainly due to the decrease in the polarizability of $SnO_2$ films.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1636-1638
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• 2007

We report on low-voltage pentacene TFTs with a Al2O3/OTS as a gate dielectric. Improving device characteristics, we performed chemical modification of self-grown Al2O3 surface with an octadecyltrichlorosilane(OTS) self-assembled monolayer(SAM). As the result of this combination, the mobility was improved from 0.3 to $0.45\;cm^2/Vs$. In addition, we examined that the SAM dipole electric field have an influence on gate leakage current, transfer and output characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.3 s.333
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• pp.9-16
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• 2005

The mobility in strained Si inversion layer on $Si_{1-x}Ge_x$ is calculated considering a quantum effect(subband energy and wavefunction) in inversion layer and relaxation time approximation. The quantum effect in inversion layer is obtained by using self-consistent calculation of $Schr\ddot{o}dinger$ and Poisson equations. For the relaxation time, intravalley and intervalley scatterings are considered. The result shows that the reason for the enhancement in mobility as Ge mole fraction increases is that the electron mobility in 2-폴드 valleys is about 3 times higher than that of 4-폴드 valleys and most electrons are located in 2-폴드 valleys as Ge mole fraction increases. Meanwhile, for the phonon-limited mobility the fitting to experimental data, Coulomb and surface roughness mobilities are included in total mobility, Deformation potentials are selected for the calculated effective field, temperature, and Ge mole fraction dependent mobilities to be fitted to experimental data, and then upgraded data can be obtained by considering nonparabolicity in Si band structure.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.454-454
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• 2011

Graphene shows unusual electronic properties, such as carrier mobility as high as 10,000 $cm^2$/Vs at room temperature and quantum electronic transport, due to its electronic structure. Carrier mobility of graphene is ten times higher than that of Silicon device. On the one hand, quantum mechanical studies have continued on graphene. One of them is quantum Hall effect which is observed in graphene when high magnetic field is applied under low temperature. This is why two dimension electron gases can be formed on Graphene surface. Moreover, quantum Hall effect can be observed in room temperature under high magnetic field and shows fractional quantization values. Quantum Hall effect is important because quantized Hall resistances always have fundamental value of h/$e^2$ ~ 25,812 Ohm and it can confirm the quantum mechanical behaviors. The value of the quantized Hall resistance is extremely stable and reproducible. Therefore, it can be used for SI unit. We study to measure quantum Hall effect in CVD graphene. Graphene devices are made by using conventional E-beam lithography and RIE. We measure quantum Hall effect under high magnetic field at low temperature by using He4 gas closed loop cryostat.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.668-672
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• 2003

In order to reach the high electrical quality of organic thin film transistors (OTFTs) such as high mobility and on-off current ratio, it is strongly desirable to study the enhancement of electrical properties in OTFTs. Here, we report the novel method of hydrogen $(H_{2})$ plasma treatment to improve electrical properties in inverted staggered OTFTs based on pentacene as active layer. To certify the effect of this method, we compared the electrical properties of normal device as a reference with those of device using the novel method. In result, the normal device as a reference making no use of this method exhibited a field effect mobility of 0.055 $cm^{2}/Vs$, on/off current ratio of $10^{3}$, threshold voltage of -4.5 V, and subthreshold slope of 7.6 V/dec. While the device using the novel method exhibited a field effect mobility of 0.174 $cm^{2}/Vs$, on/off current ratio of $10^{6}$. threshold voltage of -0.5 V, and subthreshold slope of 1.49 V/dec. According to these results, we have found the electrical performances in inverted staggered pentacene TFT owing to this novel method are remarkably enhanced. So, this method plays a key role in highly improving the electric performance of OTFTs. Moreover, this method is the first time yet reported for any OTFTs

• Progress in Superconductivity and Cryogenics
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• v.25 no.1
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• pp.1-5
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• 2023

The study of two-dimensional electron systems with extraordinarily low levels of disorder was, for a long time, the exclusive privilege of the epitaxial thin film research community. However, the successful isolation of graphene by mechanical exfoliation has truly disrupted this field. Furthermore, the assembly of heterostructures consisting of several layers of different 2D materials in arbitrary order by exploiting van der Waals forces has been a game-changer in the field of low-dimensional physics. This technique can be generalized to the large class of strictly 2D materials and offers unprecedented parameters to play with in order to tune electronic and other properties. It has led to a paradigm shift in the field of 2D condensed matter physics with bright prospects. In this review article, we discuss three device fabrication techniques towards high mobility devices: suspended structures, dry transfer, and pick-up transfer methods. We also address state-of-the-art device structures, which are fabricated by the van der Waals pick-up transfer method. Finally, we briefly introduce correlated ground states in the fractional quantum Hall regime.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.543-543
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• 2013

Thin-film transistors (TFTs) based on oxide semiconductors have been regarded as promising alternatives for conventional amorphous and polycrystalline silicon TFTs. Oxide TFTs have several advantages, such as low temperature processing, transparency and high field-effect mobility. Lots of oxide semiconductors for example ZnO, SnO2, In2O3, InZnO, ZnSnO, and InGaZnO etc. have been researched. Particularly, zinc-tin oxide (ZTO) is suitable for channel layer of oxide TFTs having a high mobility that Sn in ZTO can improve the carrier transport by overlapping orbital. However, some issues related to the ZTO TFT electrical performance still remain to be resolved, such as obtaining good electrical contact between source/drain (S/D) electrodes and active channel layer. In this study, the bottom-gate type ZTO TFTs with staggered structure were prepared. Thin films of ZTO (40 nm thick) were deposited by DC magnetron sputtering and performed at room temperature in an Ar atmosphere with an oxygen partial pressure of 10%. After annealing the thin films of ZTO at $400^{\circ}C$ or an hour, Cu, Mo, ITO and Ti electrodes were used for the S/D electrodes. Cu, Mo, ITO and Ti (200 nm thick) were also deposited by DC magnetron sputtering at room temperature. The channel layer and S/D electrodes were defined using a lift-off process which resulted in a fixed width W of 100 ${\mu}m$ and channel length L varied from 10 to 50 ${\mu}m$. The TFT source/drain series resistance, the intrinsic mobility (${\mu}i$), and intrinsic threshold voltage (Vi) were extracted by transmission line method (TLM) using a series of TFTs with different channel lengths. And the performances of ZTO TFTs were measured by using HP 4145B semiconductor analyzer. The results showed that the Cu S/D electrodes had a high intrinsic field effect mobility and a low effective contact resistance compared to other electrodes such as Mo, ITO and Ti.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.187-187
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• 2012

Solution-processed metal-alloy oxides such as indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) has been extensively researched due to their high electron mobility, environmental stability, optical transparency, and solution-processibility. In spite of their excellent material properties, however, there remains a challenging problem for utilizing IZO or IGZO in electronic devices: the supply shortage of indium (In). The cost of indium is high, what is more, indium is becoming more expensive and scarce and thus strategically important. Therefore, developing an alternative route to improve carrier mobility of solution-processable ZnO is critical and essential. Here, we introduce a simple route to achieve high-performance and low-temperature solution-processed ZnO thin film transistors (TFTs) by employing alkali-metal doping such as Li, Na, K or Rb. Li-doped ZnO TFTs exhibited excellent device performance with a field-effect mobility of $7.3cm^2{\cdot}V-1{\cdot}s-1$ and an on/off current ratio of more than 107. Also, in case of higher drain voltage operation (VD=60V), the field effect mobility increased up to $11.45cm^2{\cdot}V-1{\cdot}s-1$. These all alkali metal doped ZnO TFTs were fabricated at maximum process temperature as low as $300^{\circ}C$. Moreover, low-voltage operating ZnO TFTs was fabricated with the ion gel gate dielectrics. The ultra high capacitance of the ion gel gate dielectrics allowed high on-current operation at low voltage. These devices also showed excellent operational stability.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.182-189
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• 2011

In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.482-483
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• 2011

Graphene is a good candidate for the future nano-electronic materials because it has excellent conductivity, mobility, transparency, flexibility and others. Until now, most graphene researches are focused on the nano electronic device applications, however, biological application of graphene has been relatively less reported. We have fabricated a deoxyribonucleic acid (DNA) conjugated graphene field-effect transistor (FET) and measured the electrical transport characteristics. We have used graphene sheets grown on Ni substrates by chemical vapour deposition. The Raman spectra of graphene sheets indicate high quality and only a few number of layers. The synthesized graphene is transferred on top of the substrate with pre-patterned electrodes by the floating-and-scooping method [1]. Then we applied adhesive tapes on the surface of the graphene to define graphene flakes of a few micron sizes near the electrodes. The current-voltage characteristic of the graphene layer before stripping shows linear zero gate bias conductance and no gate operation. After stripping, the zero gate bias conductance of the device is reduced and clear gate operation is observed. The change of FET characteristics before and after stripping is due to the formation of a micron size graphene flake. After combined with 30 base pairs single-stranded poly(dT) DNA molecules, the conductance and gate operation of the graphene flake FETs become slightly smaller than that of the pristine ones. It is considered that DNA is to be stably binding to the graphene layer due to the ${\pi}-{\pi}$ stacking interaction between nucleic bases and the surface of graphene. And this binding can modulate the electrical transport properties of graphene FETs. We also calculate the field-effect mobility of pristine and DNA conjugated graphene FET devices.