• ETRI Journal
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• 제25권3호
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• pp.203-209
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• 2003

This paper reports on our investigation of DC and RF characteristics of p-channel metal oxide semiconductor field effect transistors (pMOSFETs) with a compressively strained $Si_{0.8}Ge_{0.2}$ channel. Because of enhanced hole mobility in the $Si_{0.8}Ge_{0.2}$ buried layer, the $Si_{0.8}Ge_{0.2}$ pMOSFET showed improved DC and RF characteristics. We demonstrate that the 1/f noise in the $Si_{0.8}Ge_{0.2}$ pMOSFET was much lower than that in the all-Si counterpart, regardless of gate-oxide degradation by electrical stress. These results suggest that the $Si_{0.8}Ge_{0.2}$ pMOSFET is suitable for RF applications that require high speed and low 1/f noise.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.63-63
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• 2009

Many researchers have been studied as active and transparent electrode using ZnO (Zinc oxide) inorganic semiconductor material due to their good properties such as wide band-gap and high electrical properties compared with amorphous-Si. In this study, we fabricated ZnO films by the RF magnetron sputtering method at a low temperature for a channel layer in thin-film transistor (TFT) and investigated the characteristics of sputtered ZnO films. Also, the electrical properties of TFT using ZnO channel layer such as field effect mobility(${\mu}$), threshold voltage ($V_{th}$), and $I_{on/off}$ ratio are investigated for the application of the display and electronic devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.61-61
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• 2009

P-type SGS-TFTs with 10 ${\mu}m$ channel length and two channel widths; $W_1=5{\mu}m$ and $W_2=10{\mu}m$ which has gate insulator made of 20nm $SiO_2$ and 80nm SiNx was fabricated and the electrical properties of them were measured. The field-effect mobility was increased from 95.84 to 104.19 $cm^2/V-s$ and threshold voltage also increased from -0.802 V to -0.954 V, when channel width is increased from5 ${\mu}m$ to 10 ${\mu}m$. Subthreshold swing decreased from 0.418 to 0.343 V/dec and $I_{on/off}$ ratio increased from $4.77{\times}10^7$ to $7.30{\times}10^7$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.39-39
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• 2009

We fabricated p-channel TFTs based on poly Silicon. The 35nm thickness silicon dioxide layer structure got higher $I_{on}/I_{off}$ ratio, field-effect Mobility and output current than 10nm thickness. And 35nm layer showed low leakage current and threshold voltage. So, 35nm thickness silicon dioxide layer TFTs are faster reaction speed and lower power consumption than 10nm thickness.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.62-62
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• 2009

Electrical properties of SGS-TFT with 5/5 ${\mu}m$ channel width and length which gate insulator is made of 20nm $SiO_2$ and 80nm $SiN_x$ was fabricated and measured at various temperatures. The field-effect mobility was decreased from 86.25 to 80.42 $cm^2/Vs$ and threshold voltage also decreased from -1.5792 to -1.0492 V, when temperature is increased from room temperature to $100^{\circ}C$. Subthreshold swing, also, increased from 0.3212 to 0.4818 V/dec and $I_{on/off}$ ratio decreased from $5.05{\times}10^7$ to $6.93{\times}10^5$.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.489-492
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• 2004

In this paper, we demonstrate polymer thin-film transistors (TFTs) on a paper-based flexible substrate. As a substrate, commercially available photo-paper is used with Parylene coating. The parylene layer enables conventionally used wet chemical process and vacuum deposition processes for electrodes and gate insulator. As an active channel layer, we used poly-3-hexylthiophene (P3HT) which is solution process. Field effect mobility up to $(0.06 {\pm} 0.02) cm^2/Vs$ and on/off ratio of $10^3 {\~}10^4$ are achieved on a photo-paper.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.329-329
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• 2016

Large-area graphene films produced by means of chemical vapor deposition (CVD) are polycrystalline and thus contain numerous grain boundaries that can greatly degrade their performance and produce inhomogeneous properties. A better grain boundary engineering in CVD graphene is essential to realize the full potential of graphene in large-scale applications. Here, we report a defect-selective atomic layer deposition (ALD) for stitching grain boundaries of CVD graphene with ZnO so as to increase the connectivity between grains. In the present ALD process, ZnO with hexagonal wurtzite structure was selectively grown mainly on the defect-rich grain boundaries to produce ZnO-stitched CVD graphene with well-connected grains. For the CVD graphene film after ZnO stitching, the inter-grain mobility is notably improved with only a little change in free carrier density. We also demonstrate how ZnO-stitched CVD graphene can be successfully integrated into wafer-scale arrays of top-gated field effect transistors on 4-inch Si and polymer substrates, revealing remarkable device-to-device uniformity.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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• pp.72-73
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• 2009

In this study, we fabricated of pentacene organic thin film trasistor(OTFT), which used aluminum oxide for the gate insulator on glass substrate. Aluminum oxide for OTFTs was deposited on the gate layer by E-beam evaporation. aluminum oxide fabricated various deposition rate. In this case of the deposition rate of $0.1\;{\AA}$, the fabricated aluminum oxide gate insulator OTFT showed a threshold voltage of -1.36V, an on/off current ratio of $1.9{\times}l0^3$ and field effect mobility $0.023\;cm^2/V_s$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1499-1500
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• 2011

In this paper, we investigated the electrical properties change of 6,13-bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) depending on polymer blend. We fabricated organic thin film transistor (OTFT) using blending solution of small molecule and polymer. In this study poly(2-methoxy-5-(2-ethyl-hexyloxy)-1,4-phenylene-vinylene) (MEH-PPV), poly (9-vinylcarbazole) (PVK), poly [N,N'-bis(4-butylphenyl)-N,N'-bis(phenyl)benzidine] (poly-TPD), poly(${\alpha}$-methyl styrene), Poly(methyl methacrylate) (PMMA) are used as a polymer. Fabricated OTFT with blending solution of TIPS-pentacene and PVK shows best performance in this experiment. OTFT fabricated by blending solution of TIPS-pentacene and PVK shows field effect mobility of 0.0189 $cm^2/V{\cdot}s$, on/off ratio of 1.9E-5 and threshold voltage of 7.4 V.

• 한국전기전자재료학회논문지
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• 제22권12호
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• pp.1063-1066
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• 2009

In this study, we fabricated pentacene organic thin film trasistors(OTFTs) which used aluminum oxide as the gate insulator. Aluminum oxide for OTFTs was deposited on glass substrate with a different deposition rate by E-beam evaporation. In case of the deposition rate of $0.1\;{\AA}$, the fabricated aluminum oxide gate insulating OTFT showed a threshold voltage of -1.36 V, an on/off current ratio of $1.9{\times}10^3$ and field effect mobility $0.023\;cm^2/V_s$.