• 제목/요약/키워드: Fault simulation

검색결과 1,317건 처리시간 0.027초

Analytical fault tolerant navigation system for an aerospace launch vehicle using sliding mode observer

  • Hasani, Mahdi;Roshanian, Jafar;Khoshnooda, A. Majid
    • Advances in aircraft and spacecraft science
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    • 제4권1호
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    • pp.53-64
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    • 2017
  • Aerospace Launch Vehicles (ALV) are generally designed with high reliability to operate in complete security through fault avoidance practices. However, in spite of such precaution, fault occurring is inevitable. Hence, there is a requirement for on-board fault recovery without significant degradation in the ALV performance. The present study develops an advanced fault recovery strategy to improve the reliability of an Aerospace Launch Vehicle (ALV) navigation system. The proposed strategy contains fault detection features and can reconfigure the system against common faults in the ALV navigation system. For this purpose, fault recovery system is constructed to detect and reconfigure normal navigation faults based on the sliding mode observer (SMO) theory. In the face of pitch channel sensor failure, the original gyro faults are reconstructed using SMO theory and by correcting the faulty measurement, the pitch-rate gyroscope output is constructed to provide fault tolerant navigation solution. The novel aspect of the paper is employing SMO as an online tuning of analytical fault recovery solution against unforeseen variations due to its hardware/software property. In this regard, a nonlinear model of the ALV is simulated using specific navigation failures and the results verified the feasibility of the proposed system. Simulation results and sensitivity analysis show that the proposed techniques can produce more effective estimation results than those of the previous techniques, against sensor failures.

영구자석 동기전동기 드라이브의 확장형 칼만필터를 이용한 개방성 고장진단 기법 (Fault Diagnosis Scheme for Open-Phase Fault of Permanent Magnet Synchronous Motor Drive using Extended Kalman Filter)

  • 안성국;박병건;김래영;현동석
    • 전력전자학회논문지
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    • 제16권2호
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    • pp.191-198
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    • 2011
  • 본 논문에서는 영구자석 동기전동기 구동용 인버터 스위치에서 개방성 고장이 발생하여도 구동 성능을 유지하기 위한 고장진단 기법이 제안 되었다. 제안한 고장진단 기법은 확장형 칼만필터에 의해 실시간으로 추정된 고정자 저항이 개방성 고장발생 시 고장발생 위치에 따라서 다르게 추정되는 것을 이용하여 고장을 진단한다. 고장진단을 위한 제어 알고리즘을 별도의 하드웨어 구성없이 기존의 제어 프로그램에 추가함으로써 비용을 저감 시킬 수 있으며 추정된 고정자 저항은 상수 변동에 영향을 받는 제어기의 전동기 상수로 사용함으로써 제어 성능을 향상 시킬 수 있다. 제안한 고장진단 기법의 타당성은 시뮬레이션과 실험을 통하여 검증하였다.

Study on Application of Superconducting Fault Current Limiter Considering Risk of Circuit Breaker Short-Circuit Capacity in a Loop Network System

  • Kim, Jin-Seok;Lim, Sung-Hun;Kim, Jae-Chul
    • Journal of Electrical Engineering and Technology
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    • 제9권6호
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    • pp.1789-1794
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    • 2014
  • This paper suggests an application method for a superconducting fault current limiter (SFCL) using an evaluation index to estimate the risk regarding the short-circuit capacity of the circuit breaker (CB). Recently, power distribution systems have become more complex to ensure that supply continuously keeps pace with the growth of demand. However, the mesh or loop network power systems suffer from a problem in which the fault current exceeds the short-circuit capacity of the CBs when a fault occurs. Most case studies on the application of the SFCL have focused on its development and performance in limiting fault current. In this study, an analysis of the application method of an SFCL considering the risk of the CB's short-circuit capacitor was carried out in situations when a fault occurs in a loop network power system, where each line connected with the fault point carries a different current that is above or below the short-circuit capacitor of the CB. A loop network power system using PSCAD/EMTDC was modeled to investigate the risk ratio of the CB and the effect of the SFCL on the reduction of fault current through various case studies. Through the risk evaluations of the simulation results, the estimation of the risk ratio is adequate to apply the SFCL and demonstrate the fault current limiting effect.

고장점 탐색 장치를 위한 신호처리 연구 (Signal Processing Technology for Fault location System in Underground Power Cable)

  • 이재덕;류희석;정동학;최상봉;남기영;정성환;김대경
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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    • pp.712-714
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    • 2005
  • With rapid growth of industry, underground power delivery systems are growing so rapidly and its capacity also growing. So if there are any accident in underground power cable, its inference is too great to count. So power system operators should find Its fault location as soon as possible and replace it But it is difficult to find its fault location for underground power cable. We are developing fault location system for underground power cable which can detect its fault location exactly. This system usually monitor underground power cable on-line But if there are an accident, it record Its transient signal and we can calculate fault location by analyzing it. To develop fault location system for power cable, we needed fault simulation system and we installed it physically and tested at various point. in this thesis, we describe on signal processing technology to detect fault location on power cable and on the result of tested fault location performance.

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유전알고리즘을 이용한 조합회로용 테스트패턴의 고장검출률 향상 (Fault Coverage Improvement of Test Patterns for Com-binational Circuit using a Genetic Algorithm)

  • 박휴찬
    • Journal of Advanced Marine Engineering and Technology
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    • 제22권5호
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    • pp.687-692
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    • 1998
  • Test pattern generation is one of most difficult problems encountered in automating the design of logic circuits. The goal is to obtain the highest fault coverage with the minimum number of test patterns for a given circuit and fault set. although there have been many deterministic algorithms and heuristics the problem is still highly complex and time-consuming. Therefore new approach-es are needed to augment the existing techniques. This paper considers the problem of test pattern improvement for combinational circuits as a restricted subproblem of the test pattern generation. The problem is to maximize the fault coverage with a fixed number of test patterns for a given cir-cuit and fault set. We propose a new approach by use of a genetic algorithm. In this approach the genetic algorithm evolves test patterns to improve their fault coverage. A fault simulation is used to compute the fault coverage of the test patterns Experimental results show that the genetic algorithm based approach can achieve higher fault coverages than traditional techniques for most combinational circuits. Another advantage of the approach is that the genetic algorithm needs no detailed knowledge of faulty circuits under test.

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고주파를 이용한 송전선로의 사고 검출 및 판별에 관한 연구 (A Study on the Fault Detection and Discrimination of Transmission Line using Fault-generated High Frequency Signals)

  • 이동준;김철환;김일동
    • 대한전기학회논문지:전력기술부문A
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    • 제48권8호
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    • pp.924-931
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    • 1999
  • Most conventional protection relays are based on processing information in the spectrum that is close to or at power frequency. It is, however, widely known that faults on transmission lines produce frequency components of a wide range. High frequency signals caused by sudden changes in system voltage that occurs in the immediate post-fault period are generally outside the bandwidth of receptibility of most protection scheme. In this respect, a specially designed stack tuner is connected to the coupling capacitor of CVT, in order to capture the high frequency signals. Digital signal processing is then applied to the captured information to determine whether the fault is inside or outside the protected zone, and to discriminate the fault type. In this paper, modal transform is not applied to fault generated signals, because signals which are converted by modal transform are not have an information of each phase any longer. Instead, using peak voltage value of data windows is able to discriminate fault type. The paper concludes by presenting fault detection and discrimination of various faults on transmission line which are based on extensive simulation studies carried out on a typical 154kV Korean transmission line, using the EMTP software.

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병행 2회선 송전선로의 선간단락시 고장점 표정의 개선에 관한 연구 (A Study on Advanced Fault Locating for Short Fault of a Double Circuit Transmission Line)

  • 박유영;박철원
    • 조명전기설비학회논문지
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    • 제30권1호
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    • pp.28-37
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    • 2016
  • Fault locating is an important element to minimize the damage of power system. The computation error of fault locator may occur by the influence of the DC offset component during phasor extraction. In order to minimize the bad effects of DC offset component, this paper presents an improved fault location algorithm based on a DC offset removal filter for short fault in a double circuit transmission line. We have modeled a 154kV double circuit transmission line by the ATP software to demonstrate the effectiveness of the proposed fault locating algorithm. The line to line short faults were simulated and then collected simulation data was used. It can be seen that the error rate of fault locating estimation by the proposed algorithm decreases than the error rate of fault locating estimation by conventional algorithm.

신경망무고장모델과 이중퍼지로직을 사용한 냉방기 고장진단 알고리즘 (Fault Diagnosis Algorithm of an Air-conditioning System by using a Neural No-fault Model and a Dual Fuzzy Logic)

  • 한도영;정남철
    • 설비공학논문집
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    • 제18권10호
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    • pp.791-799
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    • 2006
  • The fault diagnosis technologies may be applied in order to decrease the energy consumption and the maintenance cost of an air-conditioning system. In this paper, a fault diagnosis algorithm was developed by using a neural no-fault model and a dual fuzzy logic. Five different faults, such as the compressor valve leakage, the liquid line blockage, the condenser fouling, the evaporator fouling, and the refrigerant leakage of an air-conditioning system, were considered. The fault diagnosis algorithm was tested by using a fault simulation facility. Test results showed that the algorithm developed for this study was effective to detect and diagnose various faults. Therefore, this algorithm may be practically used for the fault diagnosis of an air-conditioning system.

스파스 매트릭스 컨버터의 간단한 개방 사고 검출 기법 (A Simple Open-Circuit Fault Detection Method for a Sparse Matrix Converter)

  • 이은실;이교범;정규범
    • 전력전자학회논문지
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    • 제18권3호
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    • pp.217-224
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    • 2013
  • This paper presents a diagnostic method for a sparse matrix converter that detects faults in any single switch or a pair of switches. The sparse matrix converter is functionally equivalent to the standard matrix converter but has a reduced number of switches. The proposed diagnostic method is based in the measurement of input and output currents. The currents have respective characteristic according to the location of faulty switches. This method not only detects the switches of open-circuit fault but identifies the location of the faulty switching devices without complicated calculations. The simulation and experimental results verify that, based on the proposed method, the fault of sparse matrix converter can be easily and fast detected.

Direct Duty-ratio Modulated Fault-tolerant Strategy for Matrix Converter-fed Motor Drives

  • Li, Yulong;Choi, Nam-Sup;Han, Byung-Moon;Nho, Eui-Cheol
    • Journal of Power Electronics
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    • 제12권1호
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    • pp.24-32
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    • 2012
  • Direct duty-ratio PWM schemes for continuous fault tolerant operation of matrix converter-fed motor drives are presented. The proposed method features simple modular modulation structure based on per output phase concept, which requires no additional modification on the normal modulation schemes for fault-tolerant applications. Realizations of fault-tolerant strategy applied to different system configurations are also treated to enhance the system flexibility. The proposed method can be effectively applied to treat the motor open phase fault and converter switching device failure. Simulation and experimental results show the feasibility and validation of the proposed strategies.