• Title/Summary/Keyword: Fast peak detector

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Novel Fast Peak Detector for Single- or Three-phase Unsymmetrical Voltage Sags

  • Lee, Sang-Hoey;Cha, Han-Ju
    • Journal of Electrical Engineering and Technology
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    • v.6 no.5
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    • pp.658-665
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    • 2011
  • In the present paper, a novel fast peak detector for single- or three-phase unsymmetrical voltage sags is proposed. The proposed detector is modified from a single-phase digital phase-locked loop based on a d-q transformation using an all-pass filter (APF). APF generates a virtual phase with $90^{\circ}$ phase delay. However, this virtual phase cannot reflect a sudden change of the grid voltage in the moment of voltage sag, which causes a peak value to be significantly distorted and to settle down slowly. Specifically, the settling time of the peak value is too long when voltage sag occurs around a zero crossing, such as phase $0^{\circ}$ and $180^{\circ}$. This paper describes the operating principle of the APF problem and proposes a modified all-pass filter (MAPF) to mitigate the inherent APF problem. In addition, a new fast peak detector using MAPF is proposed. The proposed detector is able to calculate a peak value within 0.5 ms, even when voltage sag occurs around zero crossing. The proposed fast peak detector is compared with the conventional detector using APF. Results show that the proposed detector has faster detection time in the whole phase range. Furthermore, the proposed fast peak detector can be effectively applied to unsymmetrical three-phase voltage sags. Simulation and experimental results verify the advantages of the proposed detector and MAPF.

A Fast RSSI using Novel Logarithmic Gain Amplifiers for Wireless Communication

  • Lee, Sung-Ho;Song, Yong-Hoon;Nam, Sang-Wook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.1
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    • pp.22-28
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    • 2009
  • This paper presents a fast received signal strength indicator (RSSI) circuit for wireless communication application. The proposed circuit is developed using power detectors and an analog-to-digital converter to achieve a fast settling time. The power detector is consisted of a novel logarithmic variable gain amplifier (VGA), a peak detector, and a comparator in a closed loop. The VGA achieved a wide logarithmic gain range in a closed loop form for stable operation. For the peak detector, a fast settling time and small ripple are obtained using the orthogonal characteristics of quadrature signals. In $0.18-{\mu}m$ CMOS process, the RSSI value settles down in $20{\mu}s$ with power consumption of 20 mW, and the maximum ripple of the RSSI is 30 mV. The proposed RSSI circuit is fabricated with a personal handy-phone system transceiver. The active area is $0.8{\times}0.2\;mm^2$.

Dynamic Response Improvement of Stand Alone Engine-Generator System using Double Voltage Detection Method (전압 이중 검출법에 의한 독립형 엔진-발전기 시스템 응답특성 개선)

  • Lee, Dong-Hee;Ahn, Jin-Woo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.7
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    • pp.1195-1199
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    • 2008
  • In this paper, peak detector of generator's output voltage and variable gain controller are introduced for a fast dynamic response. The conventional r,m.s, signal detected has inherent time delay, and the dynamic response of generator using conventional PID controller has some problem in sudden load change. In this paper, the peak detector and signal selector with variable gain controller is used to overcome this problem. The main controller can check the voltage state from the peak detector. When a sudden load change, the over-voltage and under-voltage signal from peak detector change the controller's gain and exciter's current reference. The proposed scheme can improve the dynamic response, which is verified from experimental test of 200kW diesel engine-generator.

Specialized VLSI System Design for the Generalized Hough Transform (일반화된 Hough 변환을 위한 특수 목적 VLSI 시스템 설계에 관한 연구)

  • 채옥삼;이정헌
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.3
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    • pp.66-76
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    • 1995
  • In this research, a mesh connected VLSI structure is proposed for the real time computation of the generalized Hough transform(GHT). The purpose of the research is to design a generalized Hough transformer that can be realized as a single chip processor. The GHT has been modified to yield a highly parallel structure consisting of simple processing elements(PEs) and communication networks. In the proposed structure, the GHT can be computed by first assigning an image pixel to a PE and performing shift and add operations. The result of the CAD circuit simulation shows that it can be computed in the time proportional to the number of pixels in the pattern. In addition to the Hough transformer, the peak detector has been designed to reduce 1)the number of the I/O operations between the transformer and the host computer and 2) the host computer's burden for peak detection by transmitting only the local peaks detected from the transformed accumulator. It is expected that the proposed single chip Hough transformer with peak detector makes a fast and inexpensive edge based object recognition systems possible for many industrial and military applications.

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A Compact and Fast Measurement System for the Detection of Small Capacitance

  • Youngshin Woo;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.2 no.1
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    • pp.16-21
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    • 2001
  • A new technique to measure low level capacitance variations of a gyroscope is proposed. It is based on the improved CVC(capacitance to voltage converter) biased by a d.c. current source and the peak detector without any low pass filter. This setup of the measurement system makes it possible to provide higher speed of measurement and wide operation range. The d,c, drift of the conventional CVC and stray capacitances are automatically compensated. Key parameters that affect the performance of the measurement system are illustrated and computer simulation results are presented. The demonstrated measurement system for micromachined gyroscope applications shows a linearity of 0.99972 and a resolution of 0.67fF from 10 fF to 120 fF at 10 kHz.

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A Study on Characteristics of Diode Detecter for Verification of Radiation Therapy (방사선 치료위치 검증을 위한 다이오드 검출기의 특성에 관한 연구)

  • 이동훈;김윤종;지영훈;이동한;홍승홍
    • Proceedings of the IEEK Conference
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    • 2000.06e
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    • pp.106-109
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    • 2000
  • The diode characteristics for therapy radiation sensor have been studied by irradiating therapy radiation from the MM22 microtron accelerator. Signal processing has been performed in the pulse mode which can process the signal fast. We have designed integrator, peak detector and synchronization circuit to detect diode signal in the pulse mode for implementation of portal image. We also read the diode signal by A/D board and displayed the peak value with LabView program. Because the quality of portal image obtained by film in the case of therapy radiation is much worse than that of diagnostic film, Digital radiography system by rectifier diode detector was suggested for portal Image.

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Design of Digital Voltage Regulation System for 200kW Engine-Generator (200kW급 엔진-발전기의 디지털 전압제어 시스템 설계)

  • Kim, Tae-Hyoung;Lee, Dong-Hee;Ahn, Jin-Woo
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.912-913
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    • 2008
  • In this paper, peak detector of generator output voltage and variable gain controller is introduced for the fast dynamic response. The general r.m.s. detecting signal of generator has inherent time delay from the actual signal. So the dynamic response of generator using conventional PID controller has some problem in sudden load change. In order to overcome this problem, the peak detector and signal selector with variable gain controller is used in this paper. The proposed control scheme is verified from experimental test of 200kW diesel engine-generator.

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Evaluation of neutron attenuation properties using helium-4 scintillation detector for dry cask inspection

  • Jihun Moon;Jisu Kim;Heejun Chung;Sung-Woo Kwak;Kyung Taek Lim
    • Nuclear Engineering and Technology
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    • v.55 no.9
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    • pp.3506-3513
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    • 2023
  • In this paper, we demonstrate the neutron attenuation of dry cask shielding materials using the S670e helium-4 detector manufactured by Arktis Radiation Ltd. In particular, two materials expected to be applied to the TN-32 dry cask manufactured by ORANO Korea and KORAD-21 by the Korea Radioactive Waste Agency (KORAD) were utilized. The measured neutron attenuation was compared with our Monte Carlo N-Particle Transport simulation results, and the difference is given as the root mean square (RMS). For the fast neutron case, a rapid decline in neutron counts was observed as a function of increasing material thickness, exhibiting an exponential relationship. The discrepancy between the experimentally acquired data and simulation results for the fast neutron was maintained within a 2.3% RMS. In contrast, the observed thermal neutron count demonstrated an initial rise, attained a maximum value, and exhibited an exponential decline as a function of increasing thickness. In particular, the discrepancy between the measured and simulated peak locations for thermal neutrons displayed an RMS deviation of approximately 17.3-22.4%. Finally, the results suggest that a minimum thickness of 5 cm for Li-6 is necessary to achieve a sufficiently significant cross-section, effectively capturing incoming thermal neutrons within the dry cask.

Architecture Design of the Symbol Timing Synchronization System with a Shared Architecture for WATM using OFDM (공유 구조를 가지는 OFDM 방식의 무선 ATM 시스템을 위한 심볼 시간 동기 블록의 구조 설계)

  • 이장희;곽승현;김재석
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.86-89
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    • 1999
  • In this paper, we propose a new architecture of the fast symbol timing synchronization system which has some shared hardware blocks in order to reduce the hardware complexity. The proposed system consists of received power detector, correlation power detector using shared complex moving adders, and 2-step peak detector. Our system has detected FFT starting point within three Symbols using first two reference symbols of the frame in wireless ATM system. The new architecture was designed and simulated using VHDL. Our proposed architecture also detects a correct symbol timing synchronization within three symbols under a multi-path fading channel.

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Fast Detection Algorithm for Voltage Sags and Swells Based on Delta Square Operation for a Single-Phase Inverter System

  • Lee, Woo-Cheol;Sung, Kook-Nam;Lee, Taeck-Kie
    • Journal of Electrical Engineering and Technology
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    • v.11 no.1
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    • pp.157-166
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    • 2016
  • In this paper, a new sag and peak voltage detector is proposed for a single-phase inverter using delta square operation. The conventional sag detector is from a single-phase digital phase-locked loop (DPLL) that is based on d-q transformations using an all-pass filter (APF). The d-q transformation is typically used in the three-phase coordinate system. The APF generates a virtual q-axis voltage component with a 90° phase delay, but this virtual phase cannot reflect a sudden change in the grid voltage at the instant the voltage sag occurs. As a result, the peak value is drastically distorted, and it settles down slowly. A modified APF generates the virtual q-axis voltage component from the difference between the current and the previous values of the d-axis voltage component in the stationary reference frame. However, the modified APF cannot detect the voltage sag and peak value when the sag occurs around the zero crossing points such as 0° and 180°, because the difference voltage is not sufficient to detect the voltage sag. The proposed algorithm detects the sag voltage through all regions including the zero crossing voltage. Moreover, the exact voltage drop can be acquired by calculating the q-axis component that is proportional to the d-axis component. To verify the feasibility of the proposed system, the conventional and proposed methods are compared using simulations and experimental results.