• 한국전자통신학회논문지
• /
• 제5권4호
• /
• pp.391-398
• /
• 2010

모바일 센서 네트워크는 기존의 위치가 고정된 무선 센서 네트워크와는 다르게 비컨 노드와 일반 노드가 모두 움직일 수 있기 때문에 위치 측정 알고리즘이 일반적인 무선 센서 네트워크 환경의 알고리즘 보다 어렵다. 특히 모바일 센서 네트워크에서 노드의 움직임이 빠를 경우 기존의 위치 측정 알고리즘으로는 원하는 시간 내에 위치를 측정할 수 없다. 본 연구에서는 이러한 모바일 센서 네트워크에서의 위치 측정 알고리즘을 제안하고 성능을 향상시켜 실시간에 위치를 측정할 수 있는 기법을 연구하였다.

• 한국음향학회지
• /
• 제7권4호
• /
• pp.22-30
• /
• 1988

이 논문에서는 무한 격리벽내의 가장자리가 고정된 원형평판으로부터의 음압복사를 FFT 기법을 이용하여 계산하였다. 음장은 컴퓨터 계산시간을 절약하기 위해 Rayleigh integral 을 직접 수치해석적으로 구하는 대신에 공간영역에서 2차원 FFT 방법을 이용하였다. 그 결과 1/200의 시간을 절약할 수 있었다. FET방법은 원형평판형상 뿐만아니라 어떤 형상에도 적용 가능하며 복잡한 형상의 근거리 및 원거리 음장을 예측하는데 상당히 유효하다.

• 한국컴퓨터그래픽스학회논문지
• /
• 제23권3호
• /
• pp.47-54
• /
• 2017

본 논문은 향상된 곡률기반 GPU 등가면 레이캐스팅 기법을 제안한다. 제안한 방법은 등가면을 계산할 때 Sigg et al. [1]이 제안한 고속연산 기법을 사용하고 미분값을 계산할 때는 드 부어 알고리즘을 사용한다. 이렇게 함으로써 추가적인 텍스쳐 읽기연산의 수를 84번에서 27번으로 줄일 수 있어, 플랫폼에 따라 편차는 있으나 결과적으로 최고 약 30%가량 성능이 향상된다.

• ETRI Journal
• /
• 제31권4호
• /
• pp.429-437
• /
• 2009

This paper proposes a novel technique for 3D scene relighting with interactive viewpoint changes. The proposed technique is based on a deep framebuffer framework for fast relighting computation which adopts image-based techniques to provide arbitrary view-changing. In the preprocessing stage, the shading parameters required for the surface shaders, such as surface color, normal, depth, ambient/diffuse/specular coefficients, and roughness, are cached into multiple deep framebuffers generated by several caching cameras which are created in an automatic manner. When the user designs the lighting setup, the relighting renderer builds a map to connect a screen pixel for the current rendering camera to the corresponding deep framebuffer pixel and then computes illumination at each pixel with the cache values taken from the deep framebuffers. All the relighting computations except the deep framebuffer pre-computation are carried out at interactive rates by the GPU.

• 한국정밀공학회지
• /
• 제25권3호
• /
• pp.147-156
• /
• 2008

A new approach based on cone prism intersection method combined with sorting algorithm is proposed for the fast and robust signed distance field computation. In the method, the space bounding the geometric model composed of triangular net is divided into multiple smaller cells. For the efficient calculation of distance fields, valid points among the triangular net which will generate minimum distances with current cell are selected by checking the intersection between current cell and cone prism generated at each point. The method is simple to implement and able to achieve an order of magnitude improvement in the computation time as compared to earlier approaches. Further the method is robust in handling the traditional sign problems. The validity of the suggested method was demonstrated by providing numerous examples including Boolean operation, shape deformation and morphing of complex geometric models.

• 제어로봇시스템학회논문지
• /
• 제20권3호
• /
• pp.372-379
• /
• 2014

This paper surveys past and state-of-the-art SLAM technologies. The standard methods for solving the SLAM problem are the Kalman filter, particle filter, graph, and bundle adjustment-based methods. Kalman filters such as EKF (Extended Kalman Filter) and UKF (Unscented Kalman Filter) have provided successful results for estimating the state of nonlinear systems and integrating various sensor information. However, traditional EKF-based methods suffer from the increase of computation burden as the number of features increases. To cope with this problem, particle filter-based SLAM approaches such as FastSLAM have been widely used. While particle filter-based methods can deal with a large number of features, the computation time still increases as the map grows. Graph-based SLAM methods have recently received considerable attention, and they can provide successful real-time SLAM results in large urban environments.

• 전자공학회논문지A
• /
• 제32A권4호
• /
• pp.75-84
• /
• 1995

Fault simulators are used for accurate evaluation of fault coverages of digital circuits. But fault simulation becomes time and memory consuming job because computation time is proportional to wquare of size of circuits. Recently, several approximate algorithms for testability analysis have been published to cope with the problems. COP is very fast but cannot be used for sequential circuits, while STAFAN can ve used for sequential circuits but requires large amount of computation because it utilizes logic simulation results. In this paper EXTASEC(An Extension of Testability Analysis for Sequential Circuits) is proposed. It is an extension of COP in the sense that it is the same as COP for combinational circuits, but it can handle sequential circuits, Xicontrollability and backward line analysis are key concept for EXTASEC. Performance of EXTASEC is proven by comparing EXTASEC with a falut simulator, STAFAN, and COP for ISCAS circuits, and the result is demonstated.

• 대한전자공학회논문지
• /
• 제24권4호
• /
• pp.667-674
• /
• 1987

In this paper an effective block matching algorithm is proposed to find the motion vector. There are two approaches to the estimation of the motion vector in MCC (motion compensated coding), i.e., pel(pixel element) recursive algorithm and block matching algorithm. The search algorithm in this paper is based on the block matching method. The advantage of a proposed algorithm using integral projections is the reduction of the computation time. While the conventional block matching methods have to be computed in 2-dimensional arrays, the proposed algorithm using integral projections can be computed in 1-dimensional arrays. In comparison with conventional block matching methods, a computer simulation shows that though the prediction error increases 0.23 db, it is not detectable for human eyes and the average reduction ratio of computation time obtained from the proposed algorithm is about 3-4.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제16권6호
• /
• pp.771-780
• /
• 2016

Detecting a set of longest paths is one of the crucial steps in static timing analysis and optimization. Recently, the process variation during manufacturing affects performance of the circuit design due to nanometer feature size. Measuring the performance of a circuit prior to its fabrication requires a considerable amount of computation time because it requires multi-corner and multi-mode analysis with process variations. An efficient algorithm of detecting the K-most critical paths in multi-corner multi-mode static timing analysis (MCMM STA) is proposed in this paper. The ISCAS'85 benchmark suite using a 32 nm technology is applied to verify the proposed method. The proposed K-most critical paths detection method reduces about 25% of computation time on average.

• 대한전자공학회논문지
• /
• 제25권2호
• /
• pp.211-219
• /
• 1988

In this paper effective block matching algorithms are proposed to find the motion vector. There are two approaches to the estimation of the motion vector in MCC (motion compensated coding), i.e.pel(pixel element) recursive algorithm and block matching algorithm. The search algorithm in this paper is based on the block matching method. The advantage of this algorithm is the reduction of the computation time. In order to reduce the computation time, three mathods are proposed in this paper. These new algorithms are faster than other methods. Compared with the three step algorithm by Koga et al., the average ratio of the computational savings obtained from the proposed algorithm is about 3-4.