• Journal of IKEEE
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• v.15 no.2
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• pp.113-121
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• 2011

This paper presents the design of a fast auxiliary channel bus for DisplayPort 1.2 interface. The fast auxiliary channel supports Manchester transactions at 1Mbps and fast auxiliary transactions at 780Mbps. The Manchester transaction is used for managing the main link and auxiliary channel and the fast auxiliary transaction is for data transfer via the auxiliary channel. Simplified serial bus architecture is proposed to be implemented in fast auxiliary channel. The fast auxiliary channel transmitter and receiver are implemented with 7,648 LUTs and 6,020 slice register synthesized in Xilinx Vertex4 FPGA and can be operated at 72MHz to support 720Mbps.

• Speech Sciences
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• v.11 no.2
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• pp.211-216
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• 2004

In this paper, we present a fast encoding algorithm for vector quantization with an approximate Euclidean distance calculation. An approximation is performed by converting floating point to the near integer. An inequality between the approximate Euclidean distance and the nearest distance is developed to avoid unnecessary distance calculations. Since the proposed algorithm rejects those codewords that are impossible to be the nearest codeword, it produces the same output as conventional full search algorithm.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.550-550
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• 2006

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.248-250
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• 2019

입자가속기는 물질의 미세 구조를 밝히기 위해 기본 입자를 가속, 충돌시키는 장치로 최근 암치료 등 의학적 용도로도 이용되고 있다. 그러나 고속으로 고압을 인가시켜야 하는 장치인 만큼 기존에 명확히 설립된 회로가 없다. 이에 본 논문에서는 Ion gate를 등가회로로 구성하여 Fast Switch 장치의 기본 회로를 제안 및 분석, 실험하였다. 또한 기본 회로에서 발생하는 문제들을 개선하고자 RC Input filter와 기타 파라미터들의 설계와 Fast switch와 Ion gate를 잇는 wire 내의 기생성분을 고찰하였고 Ion gate 구동을 위해 기준이 되는 명확한 Fast switch 회로를 제안한다.

• ETRI Journal
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• v.37 no.5
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• pp.961-971
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• 2015

This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.35-43
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• 2006

In this paper we have presented a network based high-speed handover protocol using NetLMM(Network based Localized Mobility Management) WG protocol in IETF(Internet Engineering Task Force). We use IEEE 802.21 MIHS(Media Independent Handover Services) for improving handover latency and we analysis proposed Fast NetLMM protocol performance using Fluid Flow Mobility Model. Evaluation results show that the Fast NetLMM protocol performance is better than other mobility management protocols.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.336-341
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• 2014

Dosimetry of radiating electromagnetic wave from mobile devices to human body has been evaluated by measuring Specific Absorption Rate (SAR). Usual SAR measurement system scans the volume by robot arm to evaluate RF power absorption to human body from wireless devices. It is possible to fast estimate the volume SAR by software deleting robot moving time with the 2D surface SAR data acquired by arrayed probes. This paper shows the principle of fast SAR measurement and the measured data comparison between the fast SAR system and the robot scanning system. Data of the fast SAR is well corresponding with data of robot scanning SAR within ${\pm}3$ dB, and its dynamic range covers from 10 mW/kg to 30 W/kg with 4.8 mm probe diameter.

• ETRI Journal
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• v.38 no.4
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• pp.695-702
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• 2016

A hierarchical approach for fast bi-dimensional empirical mode decomposition (B-EMD) is proposed. The presented approach utilizes an efficient window size determination scheme that enables the multi-level computation of the order statistics filter (OSF). Our detailed experiments show that the proposed OSF computation approach allows a significantly faster computation of an EMD without degrading the decomposition accuracy.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.643-646
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• 2005

We present new ramp-reset waveforms that realize fast addressing in AC-PDPs. These waveforms distort the distribution of wall charges on the surface of a phosphor layer: hence, the enhanced electric field helps to ignite a cell faster. They also reduce the black luminance: the divide of erasing ramp down discharges into two parts, i.e. a surface discharge and a vertical discharge, makes lower luminance.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.425-428
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• 2000

In this paper, we propose a new method based on SA(simulated annealing) with a fast algorithm for 3D image reconstructrion from the coded apereture images. The reconstructed images can be significantly improved by SA and to large computation cost of SA can be significantly reduced by the fast algorithm.