• Journal of the Korea Society for Simulation
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• v.14 no.1
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• pp.1-8
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• 2005

In the semiconductor manufacturing, yield enhancement is an urgent issue. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. Reviewing wafer level and composite lot level yield patterns has always been an effective way of identifying yield inhibitors and driving process improvement. This process is very time consuming and as such generally occurs only when the overall yield of a device has dropped significantly enough to warrant investigation. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map.

• Journal of Navigation and Port Research
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• v.29 no.10 s.106
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• pp.877-882
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• 2005

It is necessary that Fail-Safe Seaway technology providing a continuous navigation solution though fault of navigation system is occurred in sea. This paper focus on signal processing of GPS receiver, one of receivers using the software radio technology to implement a integrated radio navigation system including satellite-based and ground-based navigation systems. It is difficult to implement the software GPS receivers using a commercial processor because of the heavy computational burden for processing the GPS signals in real time. This paper proposes an efficient multi-bit GPS signal processing scheme to reduce the computational burden for processing the GPS signals in the software GPS receiver. The proposed scheme uses a compression concept of the multi-bit replica signals and patterned look-up table method to generate the correlation value between the GPS signals and the replica signals.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2005.10a
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• pp.37-42
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• 2005

It is necessary that Fail-Safe Seaway technology providing a continuous navigation solution though fault of navigation system is occurred in sea. This paper focus on signal processing of GPS receiver, one of receivers using the software radio technology to implement a integrated radio navigation system including satellite-based and ground-based navigation systems. It is difficult to implement the software GPS receivers using a commercial processor bemuse of the heavy computational burden for processing the GPS signals in real time. This paper proposes an efficient multi-bit GPS signal processing scheme to reduce the computational burden for processing the GPS signals in the software GPS receiver. The proposed scheme uses a compression concept of the multi-bit replica signals and patterned look-up table method to generate the correlation value between the GPS signals and the replica signals.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.703-706
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• 2003

Yield enhancement in semiconductor fabrication is important. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map, a new simple schema which facilitates the failure analysis.

• Journal of Korean Institute of Industrial Engineers
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• v.41 no.6
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• pp.579-587
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• 2015

Semiconductor manufacturing industry is a high density integration industry because it generates a vest number of data that takes about 300~400 processes that is supervised by numerous production parameters. It is asked of engineers to understand the correlation between different stages of the manufacturing process which is crucial in reducing production costs. With complex manufacturing processes, and defect processing time being the main cause. In the past, it was possible to grasp the corelation among manufacturing process stages through the engineer's domain knowledge. However, It is impossible to understand the corelation among manufacturing processes nowadays due to high density integration in current semiconductor manufacturing. in this paper we propose a canonical correlation analysis (CCA) using both wafer test voltage variables and fail bit counts variables. using the method we suggested, we can increase the semiconductor yield which is the result of the package test.

• Journal of Korean Institute of Industrial Engineers
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• v.41 no.4
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• pp.408-413
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• 2015

The quality prediction of the semiconductor industry has been widely recognized as important and critical for quality improvement and productivity enhancement. The main objective of this paper is to predict the final quality of semiconductor chips based on fail bit count information obtained from probe tests. Our proposed method consists of solving the data imbalance problem, non-parametric variable selection, and adjusting the parameters of the model. We demonstrate the usefulness and applicability of the proposed procedure using a real data from a semiconductor manufacturing.

• Geomechanics and Engineering
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• v.8 no.4
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• pp.477-493
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• 2015

In rock drilling, the most important characteristic to clarify is the wear of the drill bits. The reason that the rock drill bits fail with time is wear. In dry sliding contact adhesive wear deteriorates the materials in contact, quickly, and is the result of shear fracture in the momentary contact joins between the surfaces. This paper aims at presenting an overview of the assessment of WC/Co cemented carbide (CC) tricone bit in rotary drilling. To study wear of these bits, two approaches have been used in this research. Firstly, the new bits were weighted before they mounted on the drill rigs and also after completion their useful life to obtain bit weight loss percentage. The characteristics of the rock types drilled by using such this bit were measured, simultaneously. Alternatively, to measure contact wear, namely, matrix wear a micrometer has been used with a resolution of 0.02 mm at different direction on the tricone bits. Equivalent quartz content (EQC), net quartz content (QC), muscovite content (Mu), coarseness index (CI) of drill cuttings and compressive strength of rocks (UCS) were obtained along with thin sections to investigate mineralogical properties in detail. The correlation between effective parameters and bit wear were obtained as result of this study. It was observed that UCS shows no significant correlation with bit wear. By increasing CI and cutting size of rocks wear of bit increases.

• 한국전자현미경학회:학술대회논문집
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• 2002.05a
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• pp.73-75
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• 2002

• Proceedings of the Korea Society for Simulation Conference
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• 2003.11a
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• pp.147-151
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• 2003

Yield enhancement in semiconductor fabrication is important. Even though DRAM yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form patterns, it is usually an indication for the identification of equipment problems or process variations. In this paper describes the techniques to automatically classify a failure pattern using a fail bit map.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.11C
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• pp.1074-1080
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• 2002

In clients/server environments, the one-time password scheme using time is especially useful because it solves the synchronization problem. However, it has the problem that is time-slippage, and causes the authentication to fail. In this paper, we propose an effective one-time password algorithm, which solves the time-slippage problem through the use of 1-bit information, which denotes the duration in which the authentication could be failed because of time-slippage. This algorithm is added easily and quickly to current one-time password systems using time without requiring any change of protocols: the proposed algorithm can be implemented by adding only 1-bit information to the user authentication information, not by modifying the one-time password authentication system protocol. And we propose also the algorithm of time correction, which can be implemented by adding 2-bit information on the proposed one-time password.