• Title/Summary/Keyword: FUSE

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Design of low-power OTP memory IP and its measurement (저전력 OTP Memory IP 설계 및 측정)

  • Kim, Jung-Ho;Jang, Ji-Hye;Jin, Liyan;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.11
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    • pp.2541-2547
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    • 2010
  • In this paper, we propose a design technique which replaces logic transistors of 1.2V with medium-voltage transistors of 3.3V having small off-leakage current in repetitive block circuits where speed is not an issue, to implement a low-power eFuse OTP memory IP in the stand-by state. In addition, we use dual-port eFuse cells reducing operational current dissipation by reducing capacitances parasitic to RWL (Read word-line) and BL (Bit-line) in the read mode. Furthermore, we propose an equivalent circuit for simulating program power injected to an eFuse from a program voltage. The layout size of the designed 512-bit eFuse OTP memory IP with a 90nm CMOS image sensor process is $342{\mu}m{\times}236{\mu}m$. It is confirmed by measurement experiments on 42 samples with a program voltage of 5V that we get a good result having 97.6 percent of program yield. Also, the minimal operational supply voltage is measured well to be 0.9V.

Design of very fast acting fuse element using the Ag-Cu alloy (Ag-Cu 합금을 이용한 매우 빠른 동작 특성의 퓨즈 엘리멘트 설계)

  • Kim, Eun-Min;Lee, Seung-Hwan;Cho, Dae-Kweon;Kim, Shin-Hyo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.8
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    • pp.1070-1074
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    • 2014
  • With the development of the electronics industry and widespread supply of many different electrical appliances, the factors of the electrical fires are also diversified. For this reason, the fuse, safety-critical component, needs accurate and stable operating characteristics for preventing various fire factor, and also needs various operating characteristics. Especially when the all electrical resistance are dropped by internal short of circuit, high current inrushes and makes the fire. In order to prevent this, very fast acting fuses should be applied. However, existing very fast acting characteristics fuse has less wire dimension of element Ag100% metal than that of fast acting fuse, and it is made of plating with low melting point metals, so it satisfy very fast acting but it can't satisfy durability and safety. For this reason, in this study, through the analyzing fusing characteristics of Ag-Cu alloy composition, the new alloy composition, which implement to very fast acting fuse without decrease of fuse elements dimension, is suggested. And this study classify the operating characteristics changes, a resistance change, and the rated current of the fuse in the overall composition change of Ag-Cu alloying. and it can be utilized for designing fuse.

Study of Deterioration Improvement of Power Fuse (전력퓨즈의 열화현상 개선에 관한 연구)

  • Song, Jae-Ki;Kim, Hwan-Yong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.6
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    • pp.3827-3831
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    • 2014
  • This paper aims to solve the problem deterioration of power fuses. The deterioration of a power fuse is a cause of failure misoperation by a normal current flowing reduplicatively to fuse the element. An extension survey of a load feature rerating power fuse examined the power fuse deterioration removal, the cause of the deterioration of the power fuse, the front-after, and the thermal variation of the inside transformer room electric power equipment. The transformer showed an average improvement of $6[^{\circ}C]$. The temperature of the electrical line showed $7{\sim}8[^{\circ}C]$ improvement. The static condenser and direct reactor was $2{\sim}3[^{\circ}C]$ high-state maintenance the temperature and equipment syntonization relationship. In the subject of study $0.5{\sim}1.0[^{\circ}C]$ stabilizing three phase power fuse temperature differential was. Suggestion in the transformer room environment power equipment between the cause temperature happen elimination to deterioration of power fuse and temperature rise control.

FUSE-based Syslog Agent for File Access Log (파일 접근 로그를 위한 FUSE 기반의 Syslog 에이전트)

  • Son, Tae-Yeong;Rim, Seong-Rak
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.7
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    • pp.623-628
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    • 2016
  • Because the log information provides some critical clues for solving the problem of illegal system access, it is very important for a system administrator to gather and analyze the log data. In a Linux system, the syslog utility has been used to gather various kinds of log data. Unfortunately, there is a limitation that a system administrator should rely on the services only provided by the syslog utility. To overcome this limitation, this paper suggests a syslog agent that allows the system administrator to gather log information for file access that is not serviced by syslog utility. The basic concept of the suggested syslog agent is that after creating a FUSE, it stores the accessed information of the files under the directory on which FUSE has been mounted into the log file via syslog utility. To review its functional validity, a FUSE file system was implemented on Linux (Ubunt 14.04), and the log information of a file access was collected and confirmed.

Design of eFuse OTP Memory Programmable in the Post-Package State for PMICs (Post-Package 프로그램이 가능한 eFuse OTP 메모리 설계)

  • Jin, Liyan;Jang, Ji-Hye;Kim, Jae-Chul;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1734-1740
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    • 2012
  • In this paper, we propose a FSOURCE circuit which requires such a small switching current that an eFuse OTP memory can be programmed in the post-package state of the PMIC chips using a single power supply. The proposed FSOURCE circuit removes its short-circuit current by using a non-overlapped clock and reduces its maximum current by reducing the turned-on slope of its driving transistor. Also, we propose a DOUT buffer circuit initializing the output data of the eFuse OTP memory with arbitrary data during the power-on reset mode. We design a 24-bit differential paired eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $381.575{\mu}m{\times}354.375{\mu}m$($=0.135mm^2$).

Analysis on Recloser-Fuse Coordination in a Power Distribution System linked Small Scale Cogeneration System with Superconducting Fault Current Limiter (소형 열병합발전 시스템이 연계된 배전계통에 초전도 전류제한기 적용시 리클로져-퓨즈 협조 분석)

  • Kim, Myoung-Hoo;Kim, Jin-Seok;Moon, Jong-Fil;Lim, Sung-Hun;Kim, Jae-Chul;Lee, Joon-Kyu
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.3
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    • pp.499-505
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    • 2010
  • This paper analyzed that the coordination of recloser-fuse when a superconducting fault current limiter (SFCL) is installed to a power distribution system linked small scale cogeneration system. As a rule, the recloser to properly protect against both permanent and temporary fault is installed to upstream of fuse. Therefore, in a power distribution system linked small scale cogeneration system, the fault current is increased by adding fault current of small scale Cogeneration system when a permanent fault occurs, and the fuse could melt during the first fast operation of the recloser because of more sufficient heat from the increased current. However, when SFCLs are applied into a power distribution system linked small scale cogeneration system, the coordination of recloser-fuse could be accomplished due to decreased fault current as the effect of the impedance value of the SFCL. Therefore, to solve these problems, we analysed the operation of recloser-fuse coordination in a power distribution system linked small scale cogeneration system with SFCL using PSCAD/EMTDC.

An Analysis of the I-t Characteristic of Low Voltage Distribution Line Fuse Using the FEM (유한 요소법을 이용한 저압 배전용 전선퓨즈의 I-t 특성 해석)

  • 황명환;박두기;이세현;한상옥
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.6
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    • pp.74-80
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    • 1997
  • In this paper, we deal with the I -t characteristic of low voltage distribution fuse (line fuse). That fuse element has two parts;One is low temperature melting element(LTME) to put up with over current and the other is high temperature melting element (HTME) which put up with large current. Melting charateristic of fuse is determined by L TME and HTME. So we verified their properties of fuse design, mathematically, by simulating the thermal and electric characteristics of each other. We simulated the I-t characteristic of line fuse by using the numerical method;Finite Element Method(FEM). Then, we could acquire very similar result at the HTME and L TME area when compared the simlation result with experimental one.

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Design of Fuse Elements of Current Sensing Type Protection Device for Portable Secondary Battery Protection System (휴대용 이차전지 보호 시스템용 전류 감지 동작형 보호소자의 퓨즈 가용체 설계)

  • Kang, Chang-Yong;Kim, Eun-Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.12
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    • pp.1619-1625
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    • 2018
  • Portable electronic devices secondary batteries can cause fire and explosion due to micro-current change in addition to the situation of short-circuit inrush current, safety can not be secured with a general operation limited current fuse. Therefore, in secondary battery, it is necessary for the protector to satisfy both the limit current type operation in the open-short-circuit inrush current and the current detection operation characteristic in the micro current change situation and for this operation, a fuse for the current detection type secondary battery protection circuit can be applied. The purpose of this study is to design a protection device that operates stably in the hazardous situation of small capacity secondary battery for portable electronic devices through the design of low melting fuse elements alloy of sensing type fuse and secures stability in abnormal current state. As a result of the experiment, I-T and V-T operation characteristics are satisfied in a the design of the alloy of the current sensing type self-contained low melting point fuse and the resistance of the heating resistor. It is confirmed that it can prevent accidents of short circuit over-current and micro current change of secondary battery.

Deign of Small-Area Differential Paired eFuse OTP Memory for Power ICs (Power IC용 저면적 Differential Paired eFuse OTP 메모리 설계)

  • Park, Heon;Lee, Seung-Hoon;Jin, Kyo-Hong;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.8 no.2
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    • pp.107-115
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    • 2015
  • In this paper, a small-area 32-bit differential paired eFuse OTP memory for power ICs is designed. In case of smaller number of rows than that of columns for the OTP memory cell array, a scheme for the cell array reducing the number of SL driver circuits requiring their larger layout areas by routing the SL (source line) lines supplying programming currents for eFuse links in the row direction instead of the column direction as well as a core circuit is proposed. In addition, to solve a failure of being blown for non-blown eFuse links by the electro-migration phenomenon, a regulated voltage of V2V ($=2V{\pm}0.2V$) is used to a RWL (read word line) driver circuit and a BL (bit line) pull-up driver circuit. The layout size of the designed 32-bit eFuse OTP memory is $228.525{\mu}m{\times}105.435{\mu}m$, which is confirmed to be 20.7% smaller than that of the counterpart using the conventional cell array routing, namely $197.485{\mu}m{\times}153.715{\mu}m$.

Design of Small-Area eFuse OTP Memory for Line Scan Sensors (Line Scan Sensor용 저면적 eFuse OTP 설계)

  • Hao, Wenchao;Heo, Chang-Won;Kim, Yong-Ho;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.8
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    • pp.1914-1924
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    • 2014
  • In this paper, a small-area cell array method of reducing number of SL drivers requiring large layout areas, where the SL drivers supplying programming currents are routed in the row direction in stead of the column direction for eFuse OTP memory IPs having less number of rows than that of columns such as a cell array of four rows by eight columns, and a core circuit are proposed. By adopting the proposed cell array and core circuit, the layout area of designed 32-bit eFuse OTP memory IP is reduced. Also, a V2V ($=2V{\pm}10%$) regulator necessary for RWL driver and BL pull-up load to prevent non-blown eFuse from being blown from the EM phenomenon by a big current is designed. The layout size of the designed 32-bit OTP memory IP having a cell array of four rows by eight columns is 13.4% smaller with $120.1{\mu}m{\times}127.51{\mu}m$ ($=0.01531mm^2$) than that of the conventional design with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$).