• Journal of KIISE:Computing Practices and Letters
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• v.15 no.9
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• pp.685-689
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• 2009

Flash memory has several features such as low~power consumption and fast access so that there has been various research on using flash memory as new storage. Especially the Solid State Disk which is composed of flash memory chips has recently replaced the hard disk. At present, SSD adopts the multi-channel and multi-way architecture to exploit advantages of parallel access. In this architecture, data are written on SSD in a unit of a superblock which is composed of multiple blocks in which some blocks are put together. This paper proposes two schemes of selecting, segmenting and re-composing victim superblocks to optimize concurrent processing when a buffer flush occurs. The experimental results show that 35% of superblock- based write operations is reduced by selecting victims and additional 9% by composition of superblock.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.383-394
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• 2010

Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

• Journal of KIISE:Databases
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• v.34 no.2
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• pp.109-118
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• 2007

Recently, flash memory is used to store data in mobile computing devices such as PDAs, SmartCards, mobile phones and MP3 players. These devices need index structures like the B-tree to efficiently support some operations like insertion, deletion and search. The BFTL(B-tree Flash Translation Layer) technique was first introduced which is for implementing the B-tree on flash memory. Flash memory has characteristics that a write operation is more costly than a read operation and an overwrite operation is impossible. Therefore, the BFTL method focuses on minimizing the number of write operations resulting from building the B-tree. However, we indicate in this paper that there are many rooms of improving the performance of the I/O cost in building the B-tree using this method and it is not practical since it increases highly the usage of the SRAM memory storage. In this paper, we propose a BOF(the B-tree On Flash memory) approach for implementing the B-tree on flash memory efficiently. The core of this approach is to store index units belonging to the same B-tree node to the same sector on flash memory in case of the replacement of the buffer used to build the B-tree. In this paper, we show that our BOF technique outperforms the BFTL or other techniques.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.378-388
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• 2008

Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.11a
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• pp.914-916
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• 2011

최근 낸드 플래시 메모리 기술의 발전으로 플래시 메모리의 용량이 증가함에 따라 다양한 장치에서 데이터 저장소로 사용되고 있으며, 하드디스크를 대체할 저장 매체로서 주목을 받고 있다. 하지만 낸드 플래시 메모리의 특성으로 인해 데이터를 삭제하더라도 일정 기간 삭제된 데이터가 메모리에 남아있게 되며, 이러한 특성으로 사용자의 중요 데이터가 보호되지 않은 상태로 저장되어 외부에 노출될 수 있다. 따라서 이런 특성을 보완하는 방법이 필요하며 본 논문에서는 낸드 플래시 메모리의 단점을 해결하기 위하여 낸드 플래시 메모리를 위한 시스템 소프트웨어인 FTL(Flash Translation Layer) 계층에서 암호화 알고리즘을 사용하여 데이터를 노출하지 않게 하는 방법을 제안한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.10
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• pp.1167-1175
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• 2016

This paper proposes an efficient page-level mapping algorithm that reduces the erase count in the FTL for flash memory systems. By maintaining the weight for each write request in the request buffer, the proposed algorithm estimates the degree of temporal locality for each incoming write request. To exploit temporal locality deliberately for determination of hot request, the degree of temporal locality should be much higher than the reference point determined experimentally. While previous LRU algorithm treats a new write request to have high temporal locality, the proposed algorithm allows write requests that are estimated to have high temporal locality to access hot blocks to store hot data intensively. The pages are more frequently updated in hot blocks than warm blocks. A hot block that has most of invalid pages is always selected as victim block at Garbage Collection, which results in delayed erase operation and in reduced erase count. Experimental results show that erase count is reduced by 9.3% for real I/O workloads, when compared to the previous LRU algorithm.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.11a
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• pp.755-758
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• 2007

플래시 메모리는 휴대폰, MP3 플레이어, 개인휴대정보단말기(PDA), 휴대용 멀티미디어 플레이어(PMP), 디지털 카메라 및 캠코더와 같은 이동성이 강한 소형기기에서 가장 많이 사용되는 저장 매체이다. 최근 대용량의 값싼 플래시 메모리가 등장하면서 랩톱이나 데스크톱과 같은 일반적인 컴퓨팅 환경을 지닌 기기들에서도 그 사용이 확대되고 있는 추세이다. 플래시 메모리가 보다 범용적인 저장 장치로 사용되기 위해서는 일반 컴퓨팅 환경에서의 복잡한 작업 부하에서도 우수한 성능을 제공할 수 있는 플래시 변환 계층(Flash Translation Layer)이 반드시 필요하다. 아쉽게도 현재까지 연구된 FTL 기법들은 소형기기의 단순한 작업 부하에 알맞도록 설계되어 있으며, 일반 컴퓨팅 환경과 같이 복잡한 작업 부하를 지닌 환경에서는 우수한 성능을 제공하지 못한다는 단점을 가지고 있다. 본 논문에서는 일반 컴퓨팅 환경의 복잡한 작업 부하에 대해서도 우수한 가비지 수집 성능을 제공하는 새로운 로그 블록 교체 기법을 제안하였다. 실험을 통한 평가 결과, 제안한 기법은 기존 기법 대비 평균 35% 정도의 가비지 수집 부하를 감소시키는 것으로 나타났다.