• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.4
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• pp.387-392
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• 2014

In this paper, the broadband antenna design, which can be applied to USB Dongle, supporting Wibro(2.3~2.4 GHz), Wi-Fi(2.4~2.5 GHz) and LTE7(2.5~2.7 GHz) is proposed technique. The proposed antenna was designed similar to PIFA type antennas. Reactive elements were used to control the input impedance and wideband characteristics were achieved by controlling coupling between the feed structure and the radiator. As a result, the antenna printed on FR-4 PCB(${\epsilon}_r$ =4.4, tan ${\delta}$=0.02) occupying an area of $15{\times}5mm^2$ was able to achieve bandwidth of 1 GHz from 2.1 to 3.1 GHz under VSWR=2. Measured return loss characteristics, bandwidth and radiation patterns were in good agreement with the simulated results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.355-358
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• 2003

본 문서는 백프레인(backplane)에서 프로세서 HSTL(High-speed Transceiver Logic)의 데이터 전송 및 수신 특성을 알아보기 위해 HSPICE를 사용하여 시뮬레이션을 하였으며 Xilinx Virtex II XC2V FF896 FPGA를 이용하여 직접 제작 신호 전달특성을 분석하였다. PCB(Printed Circuit Board)는 FR-4를 사용하였으며 point to point 배선 길이에 대해 데이터 전송속도 특성을 시험하였고 구현 가능한 데이터 전송 및 수신 한계 속도에 대해 검토하였다. 시험결과 point to point 접속 신호 전송 및 수신 한계속도에 영향을 주는 것이 배선 길이와 주변 전기적 잡음이 중요한 역할을 함을 알 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.338-339
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• 2008

현재 PCB (Printed circuit board) 산업은 디스플레이, 모바일 시장의 수요 증가로 인해 활성화 되면서 다앙한 분야로 확대 되어가고 있다. 전자기기의 직접화, 고속파, 사용 주파수 영역의 증가로 인해 수십 GHz 영역에서도 활용이 가능한 소재 및 기판의 필요성이 대두되어 지고 있어 이에 대응할 수 있는 소재 개발도 다양해지고 있다. 본 논문에서는 GHz 영역에서 인쇄회로기판의 회로형태가 특성에 미치는 영향에 대해 연구하였다. 이를위해 패턴도금법과 에칭법으로 회로를 형성하였다. 패턴도금법으로 형성된 시편은 무전해 구리도금 공정을 거친 후 감광성 필름을 이용하여 전해 도금방법을 패턴을 형성하여 회로를 구현하였고, 에칭 패턴 시편은 FR4를 이용하여 동박접합과 도금 공정 후 마스크 패턴을 사용하여 노광, 현상, 에칭 공정을 거쳐 회로를 구성하였다. GHz영역에서 Transmission Line 특성을 분석하였으며 구리 패턴과 절연체사이의 계면형태가 특성에 영향을 주는 것을 확인할 수 있었다.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.1
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• pp.35-39
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• 2011

Shearing characteristics of Sn-3.0wt%Ag-0.5wt%Cu ball for standardization of high speed shear test were investigated. The solder ball of 450 ${\mu}m$ in diameter was reflowed at $245^{\circ}C$ on FR4 PCB (Printed Circuit Board) to prepare a sample for the high-speed shear test. The metal pads on the PCB were OSP (Organic Solderability Preservative, Cu pad) and ENIG (Electroless Nickel/Immersion Gold, i.e CulNi/Au). Shearing speed was varied from 0.5 to 3.0 m/s, and tip height from 10 to 135 ${\mu}m$. As experimental results, for the OSP pad, a ductile fracture increased with tip height, and it decreased with shearing speed. In the case of ENIG pad, the ductile fracture increased with the tip height. The tip height of 10 ${\mu}m$ (2% of solder ball diameter) was unsuitable since the fracture mode was mostly pad lift. Shear energy increased with increasing shearing tip height from 10 to 135 ${\mu}m$ for both of OSP and ENIG pads.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.47-53
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• 2012

Bonding strength of Sn-3.0Ag-0.5Cu solder joint due to degradation characteristic of OSP surface finish was investigated, compared with SnPb finish. The thickness variation and degradation mechanism of organic solderability preservative(OSP) coating were also analyzed with the number of reflow process. To analyze the degradation degree of solder joint strength, FR-4 PCB coated with OSP and SnPb were experienced preheat treatment as a function of reflow number from 1st to 6th pass, respectively. After 2012 chip resistors were soldered with Sn-3.0Ag-0.5Cu on the pre-heated PCB, the shear strength of solder joints was measured. The thickness of OSP increased with increase of the number of reflow pass by thermal degradation during the reflow process. It was also observed that the preservation effect of OSP decreased due to OSP degradation which led Cu pad oxidation. The mean shear strength of solder joints formed on the Cu pads finished with OSP and SnPb were 58.1 N and 62.2 N, respectively, through the pre-heating of 6 times. Although OSP was degraded with reflow process, the feasibility of its application was proven.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.163-169
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• 2019

Sn-Pb solder alloys in electronics rapidly has been replaced to Pb free solder alloys because of various environmental regulations such as restriction of hazardous substances directive (RoHS), European Union waste electrical, waste electrical and electronic equipment (WEEE), registration evaluation authorization and of chemicals (REACH) etc. Because Sn58%Bi (in wt.%) solder alloy has low melting point and higher mechanical properties than that of Sn-Pb solder, it has been studied to manufacture electronic components. However, the reliability of Sn58%Bi solder could be lowered because of the brittleness of Bi element included in the solder alloy. Therefore, we observed the microstructures of Sn58%Bi composite solders with various contents of Sn-decorated multiwalled carbon nanotube (Sn-MWCNT) particles and evaluated bonding strength of the FR-4 components assembled with Sn58%Bi composite solder. Also, microstructures and bonding strengths of the Sn58%Bi composite solder joints were evaluated with the number of reflows from 1 to 7 times, respectively. Bonding strengths and fracture energies of the Sn58%Bi composite solder joints were measured by die shear test. Microstructures and fracture modes were observed with scanning electron microscope (SEM). Microstructures in the Sn58%Bi composite solder joints were finer than that of only Sn58%Bi solder joint. Bonding strength and fracture energy of Sn58%Bi composite solder including 0.1 wt.% of Sn-decorated MWCNT particles increased up to 20.4% and 15.4% at 5 times in reflow, respectively.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.81-85
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• 2007

Embedded capacitor technology can improve electrical perfomance and reduce assembly cost compared with traditional discrete capacitor technology. To improve the capacitance density of the $Al_2O_3$ based embedded capacitor on Cu cladded fiber reinforced plastics (FR-4), the specific surface area of the $Al_2O_3$ thin films was enlarged and their surface morphologies were controlled by anodization process parameters. From I-V characteristics, it was found that breakdown voltage and leakage current were 23 V and $1{\times}10^{-6}A/cm^2$ at 3.3 V, respectively. We have also measured C-V characteristics of $Pt/Al_2O_3/Al/Ti$ structure on CU/FR4. The capacitance density was $300nF/cm^2$ and the dielectric loss was 0.04. This nano-porous $Al_2O_3$ is a good material candidate for the embedded capacitor application for electronic products.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.2
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• pp.15-22
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• 2013

Low-Temperature-cofired ceramics (LTCC) antenna packages have been extensively researched and utilized in recent years due to its excellent electrical properties and ease of implementing dense package integration topologies. This paper introduces some of the key research and development activities using LTCC packaging solutions for 60 GHz antennas at Samsung Electronics [1]. The LTCC 60 GHz antenna element topology is presented and its measured results are illustrated. However, despite its excellent performance, the high cost issues incurred with LTCC at millimeter wave (mmWave) frequencies for antenna packages remains one of the key impediments to mass market commercialization of mmWave antennas. To address this matter, for the first time to the author's best knowledge this paper alleviates the high cost of mmWave antenna packaging by devising a novel, broadband antenna package that is wholly based on low-cost, high volume FR4 Printed Circuit Board (PCB). The electrical properties of the FR4 substrate are first characterized to examine its feasibility at 60 GHz. Afterwards a compact multi-layer antenna package which exhibits more than 9 GHz measured bandwidth ($S_{11}{\leq}-10$ dB) from 57~66 GHz is devised. The measured normalized far-field radiation patterns and radiation efficiency are also presented and discussed.

• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.603-609
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• 2013

In this paper, we describe the analysis of inkjet-printed silver (Ag) patterns on epoxy-coated substrates according to several reliability evaluation test method guidelines for conventional printed circuit boards (PCB). To prepare patterns for the reliability analysis, various regular test patterns were created by Ag inkjet printing on flame retardant 4 (FR4) and polyimide (PI) substrates coated with epoxy for each test method. We coated the substrates with an epoxy primer layer to control the surface energy during printing of the patterns. The contact angle of the ink to the coated epoxy primer was $69^{\circ}$, and its surface energy was 18.6 $mJ/m^2$. Also, the substrate temperature was set at $70^{\circ}C$. We were able to obtain continuous line patterns by inkjet printing with a droplet spacing of $60{\mu}m$. The reliability evaluation tests included the dielectric withstanding voltage, adhesive strength, thermal shock, pressure cooker, bending, uniformity of line-width and spacing, and high-frequency transmission loss tests.

• ETRI Journal
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• v.33 no.3
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• pp.335-343
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• 2011

The pad pitch of modern radio frequency integrated circuits is in the order of few tens of micrometers. Connecting a large number of high-speed I/Os to the outside world with good signal fidelity at low cost is an extremely challenging task. To cope with this requirement, we need reflection-free transmission lines from an on-chip pad to on-board SMA connectors. Such a transmission line is very hard to design due to the difference in on-chip and on-board feature size and the requirement for extremely large bandwidth. In this paper, we propose the use of narrow tracks close to chip and wide tracks away from the chip. This narrow-to-wide transition in width results in impedance discontinuity. A step change in substrate thickness is utilized to cancel the effect of the width discontinuity, thus achieving a reflection-free microstrip. To verify the concept, several microstrips were designed on multilayer FR4 PCB without any additional manufacturing steps. The TDR measurements reveal that the impedance variation is less than 3 ${\Omega}$ for a 50 ${\Omega}$ microstrip and S11 better than -9 dB for the frequency range 1 GHz to 6 GHz when the width changes from 165 ${\mu}m$ to 940 ${\mu}m$, and substrate thickness changes from 100 ${\mu}m$ to 500 ${\mu}m$.