• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1527-1539
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• 2015

In this paper the hardware implementation of the direct torque control based on the fuzzy logic technique of induction motor on the Field-Programmable Gate Array (FPGA) is presented. Due to its complexity, the fuzzy logic technique implemented on a digital system like the DSP (Digital Signal Processor) and microcontroller is characterized by a calculating delay. This delay is due to the processing speed which depends on the system complexity. The limitation of these solutions is inevitable. To solve this problem, an alternative digital solution is used, based on the FPGA, which is characterized by a fast processing speed, to take the advantage of the performances of the fuzzy logic technique in spite of its complex computation. The Conventional Direct Torque Control (CDTC) of the induction machine faces problems, like the high stator flux, electromagnetic torque ripples, and stator current distortions. To overcome the CDTC problems many methods are used such as the space vector modulation which is sensitive to the parameters variations of the machine, the increase in the switches inverter number which increases the cost of the inverter, and the artificial intelligence. In this paper an intelligent technique based on the fuzzy logic is used because it is allows controlling the systems without knowing the mathematical model. Also, we use a new method based on the Xilinx system generator for the hardware implementation of Direct Torque Fuzzy Control (DTFC) on the FPGA. The simulation results of the DTFC are compared to those of the CDTC. The comparison results illustrate the reduction in the torque and stator flux ripples of the DTFC and show the Xilinx Virtex V FPGA performances in terms of execution time.

• 한국산학기술학회:학술대회논문집
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• 한국산학기술학회 2010년도 춘계학술발표논문집 1부
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• pp.357-359
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• 2010

본 논문에서는 논리 설계를 위해서 I-ROB 3000이라는 로봇 키트를 사용하여 논리 설계를 검증하였다. 이 검증에는 iRoV-Lab 3000의 장착된 로봇 모듈인 FPA 모듈,Stepper Motor 모듈,적외선 송수신센서 모듈, 카메라 모듈,RF 모듈 LED,TEXT LCD, 7-segment를 제어하기 위한 FPGA를 사용하며,FPGA설계를 위해 Schematic Design 또는HDL에 대해 연구한다.로봇 설계 시스템의 내부구조를 이해하고 개발환경을 구축할수 있다. 로봇의 구성요소와 각각의 구성요소(Sensor 모듈,display 모듈, Stepper Motor 모듈,RF 모듈)의 동작 원리를 개발한다.

• 한국산업융합학회 논문집
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• 제2권2호
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• pp.103-108
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• 1999

The paper describes a implementation of space vector pulse-width modulation voltage source inverter and interfacing of DSP using field programmable gate array(FPGA) for a induction motor vector control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QLl6X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed Application Specific Integrated Circuit(ASIC) for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance induction motor drives with a voltage source inverter. Simulation and implementation results are shown to verify the usefulness of ASIC in a motor drive system and power electronics applications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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• pp.596-599
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• 2003

In this paper, we designed the digital pulse motor control chip including a circular interpolation function. The proposed algorithm in this paper is a nonparametric cure generation algorithm (Jordan's algorith) and a very simple algorithm. So the design for this algorithm used a small number of gates. Also an average error is fairly low. The max output speed is 4Mpps(Pulse per second), the max input frequency is 16MHz and the chip is useful for the stepping and servo motors. The software contains one or two, and many axes linear interpolation algorithm and two axes circular interpolation algorithm.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 학술대회 논문집 전문대학교육위원
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• pp.187-190
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• 2002

In contrast to conventional electromagnetic motor, USM(Ultrasonic Motor), as piezoelectric ceramic applying ultrasonic mechanical vibration and as frictional-movement type motor, get rotational torque by elastic friction between stator and rotator, The USM, which is small motor without iron cores and coil as a simple structure, has little load weight, has character of high torque at low speed, and can apply a direct drive type without deceleration gear as low speed type. A response of USM from control input is satisfactory, and also generates much torque in low speed driving, and holding torque is much without supplying power. In this study, I designed and made Ultrasonic motor-digital multi controller(USM- DMC) using FPGA chip, A54SX72A made in Actel Corporation. By the minute, USM-DMC can control frequency, duty ratio, and phase difference of USM by llbit digital input from Pc. Therefore, when we use this controller, we can apply to typical parameter, frequency, phase difference, and voltage parameter, to control as well as we can do mixing control like phase-frequency, phase-voltage, frequency-voltage, frequency-phase-voltage, What is more, the strongest point is that it can trace frequency based on optimized frequency because we can input optimized resonant frequency while in motoring.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2002년도 ICCAS
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• pp.84.5-84
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• 2002

In order to be a stand-alone structure, a biped robot should be designed of the effective mechanic structure and the smaller hardware system. This paper shows the design methodology of a biped robot controller using FPGA(Field Programmable Gate Array). A hardware system consists of DSP(Digital Signal Processor) as the main CPU and FPGA as the motor controller...

• Nuclear Engineering and Technology
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• 제53권4호
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• pp.1167-1175
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• 2021

The process of automation and monitoring in industrial control system involves the use of many types of sensors. A programmable logic controller plays an important role in the automation of the different processes in the power plant system. The major control units are boiler for temperature and pressure, turbine for speed of motor, generator for voltage, conveyer belt for fuel. The power plant units are controlled using microcontrollers and PLCs, but FPGA can be the feasible solution. The paper focused on the design and simulation of hardware chip to monitor boiler, turbine, generator and conveyer belt. The hardware chip of the plant is designed in Xilinx Vivado Simulator 17.4 software using VHDL programming. The methodology includes VHDL code design, simulation, verification and testing on Virtex-5 FPGA hardware. The system has four independent buzzers used to indicate the status of the boiler, generator, turbine motor and conveyer belt in on/off conditions respectively. The GSM is used to display corresponding message on the mobile to know the status of the device in on/off condition. The system is very much helpful for the industries working on plant automation with FPGA hardware integration.

• Journal of international Conference on Electrical Machines and Systems
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• 제3권2호
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• pp.110-115
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• 2014

The reconfigurability of FPGA devices allows designers to evaluate, test and validate a new control algorithm; a new component or prototypes without damaged the real system with the so-called hardware co-simulation. The present paper uses the Xilinx System Generator (XSG) environment to establish and validate a new nonlinear estimator for the rotor time constant inverse that will be exploited to improve the indirect rotor field control of induction motor.

• International Journal of Control, Automation, and Systems
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• 제1권2호
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• pp.252-256
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• 2003

A biped robot should be designed to be an effective mechanical structure and have smaller hardware system if it is to be a stand-alone structure. This paper shows the design methodology of a biped robot controller using FPGA(Field Programmable Gate Array). A hardware system consists of DSP(Digital Signal Processor) as the main CPU, and FPGA as the motor controller. By using FPGA, more flexible hardware system has been achieved, and more compact and simple controller has been designed.