Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2003.11c
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- Pages.596-599
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- 2003
Design of a 2-axis interpolator using FPGA
FPGA를 이용한 2축 보간기의 설계
- Published : 2003.11.21
Abstract
In this paper, we designed the digital pulse motor control chip including a circular interpolation function. The proposed algorithm in this paper is a nonparametric cure generation algorithm (Jordan's algorith) and a very simple algorithm. So the design for this algorithm used a small number of gates. Also an average error is fairly low. The max output speed is 4Mpps(Pulse per second), the max input frequency is 16MHz and the chip is useful for the stepping and servo motors. The software contains one or two, and many axes linear interpolation algorithm and two axes circular interpolation algorithm.