• 마이크로전자및패키징학회지
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• 제6권4호
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• pp.61-71
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• 1999

통신분야에서 사용주파수대역의 증가, 제품의 소형화 및 가격경쟁력등의 요구에 따라 RF 소자의 패키징 기술도 플라스틱 패키지 대신에 flip chip interconnection, MCM(multichip module)등과 같은 고밀도 실장기술이 발전해가고 있다. 따라서, 본 논문은 최근 수년간 보고된 응용사례를 중심으로 RF flip chip의 기술적인 개발방향과 장점들을 분석하였고, RF 소자 및 시스템의 개발단계에 따른 적합한 적용기술을 제시하였다. RF flip chip의 기술동향을 요약하면, 1) RF chip배선은 microstrip 대신에 CPW 구조을 선택하며, 2) wafer back-side grinding을 하지 않아서 제조공정이 단순하고 wafer 파손이 적어 제조비용을 낮출 수 있고, 3) wire bonding 패키징에 비해 전기적인 특성이 우수하고 고집적의 송수신 모듈개발에 적합하다는 것이다. 그러나, CPW 배선구조의 RF flip chip 특성에 대한 충분한 연구가 필요하며 RF flip chip의 초기 개발 단계에서 flip chip interconnection 방법으로는 Au stud bump bonding이 적합할 것으로 제안한다.

• Molecules and Cells
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• 제25권2호
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• pp.184-195
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• 2008

We examined the role of c-FLIP in the motility of HeLa cells. A small interfering RNA (siRNA) directed against c-FLIP inhibited the adhesion and motility of the cells without affecting their growth rate. The long form of c-FLIP ($c-FLIP_L$), but not the short form ($c-FLIP_S$), enhanced adhesion and motility. Downregulation of $c-FLIP_L$ with siRNA decreased phosphorylation of FAK and ERK, while overexpression of $c-FLIP_L$ increased their phosphorylation. Overexpression of FAK activated ERK, and enhanced the motility of HeLa cells. FRNK, an inhibitory fragment of FAK, inhibited ERK and decreased motility. Inhibition of ERK also significantly suppressed $c-FLIP_L$-promoted motility. Inhibition of ROCK by Y27632 suppressed the $c-FLIP_L$-promoted motility by reducing phosphorylation of FAK and ERK. Overexpression of $c-FLIP_L$ increased the expression and secretion of MMP-9, and inhibition of MMP-9 by Ilomastat reduced $c-FLIP_L$- promoted cell motility. A caspase-like domain (amino acids 222-376) was found to be necessary for the $c-FLIP_L$-promoted cell motility. We conclude that $c-FLIP_L$ promotes the motility of HeLa cells by activating FAK and ERK, and increasing MMP-9 expression.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제16권2호
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• pp.658-675
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• 2022

This paper presents a fast-simplified successive cancellation (SC) flipping (Fast-SSC-Flip) decoding algorithm for polar code. Firstly, by researching the probability distribution of the number of error bits in a node caused by channel noise in simplified-SC (SSC) decoder, a measurement criterion of node reliability is proposed. Under the guidance of the criterion, the most unreliable nodes are firstly located, then the unreliable bits are selected for flipping, so as to realize Fast-SSC-Flip decoding algorithm based on node reliability (NR-Fast-SSC-Flip). Secondly, we extended the proposed NR-Fast-SSC-Flip to multiple node (NR-Fast-SSC-Flip-ω) by considering dynamic update to measure node reliability, where ω is the order of flip-nodes set. The extended algorithm can correct the error bits in multiple nodes, and get good performance at medium and high signal-to-noise (SNR) region. Simulation results show that the proposed NR-Fast-SSC-Flip decoder can obtain 0.27dB and 0.17dB gains, respectively, compared with the traditional Fast-SSC-Flip [14] and the newly proposed two-bit-flipping Fast-SSC (Fast-SSC-2Flip-E2) [18] under the same conditions. Compared with the newly proposed partitioned Fast-SSC-Flip (PA-Fast-SSC-Flip) (s=4) [18], the proposed NR-Fast-SSC-Flip-ω (ω=2) decoder can obtain about 0.21dB gain, and the FER performance exceeds the cyclic-redundancy-check (CRC) aided SC-list (CRC-SCL) decoder (L=4).

• Progress in Superconductivity
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• 제4권2호
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• pp.127-131
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• 2003

We have designed and measured an SFQ(Single Flux Quantum) OR gate for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we used WRspice, XIC and Lmeter for simulations and layouts. The OR gate was consisted of a Confluence Buffer and a D Flip-Flop. When a pulse enters into the OR gate, the pulse does not propagate to the other input port because of the Confluence Buffer. A role of D Flip-Flip is expelling the data when the clock is entered into D Flip-Flop. For the measurement of the OR gate operation, we attached three DC/SFQs, three SFQ/DCs and one RS Flip -Flop to the OR gate. DC/SFQ circuits were used to generate the data pulses and clock pulses. Input frequency of 10kHz and 1MHzwere used to generate the SFQ pulses from DC/SFQ circuits. Output data from OR gate moved to RS flip -Flop to display the output on the oscilloscope. We obtained bias margins of the D Flip -Flop and the Confluence Buffer from the measurements. The measured bias margins $\pm$38.6% and $\pm$23.2% for D Flip-Flop and Confluence Buffer, respectively The circuit was measured at the liquid helium temperature.

• 호남수학학술지
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• 제29권3호
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• pp.341-350
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• 2007

A dynamical system with a skew-commuting involution map is called a flip system. Every flip system on a subshift of finite type is represented by a pair of matrices, one of which is a permutation matrix. The transposition number of this permutation matrix is studied. We define an invariant, called the flip number, that measures the complexity of a flip system, and prove some results on it. More properties of flips on subshifts of finite type with symmetric adjacency matrices are investigated.

• ETRI Journal
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• 제36권6호
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• pp.942-952
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• 2014

This paper presents a novel test point insertion (TPI) method for a pseudo-random built-in self-test (BIST) to reduce the area overhead. Recently, a new TPI method for BISTs was proposed that tries to use functional flip-flops to drive control test points instead of adding extra dedicated flip-flops for driving control points. The replacement rule used in a previous work has limitations preventing some dedicated flip-flops from being replaced by functional flip-flops. This paper proposes a logic cone analysis-based TPI approach to overcome the limitations. Logic cone analysis is performed to find candidate functional flop-flops for replacing dedicated flip-flops. Experimental results indicate that the proposed method reduces the test point area overhead significantly with minimal loss of testability by replacing the dedicated flip-flops.

• 반도체디스플레이기술학회지
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• 제8권2호
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• pp.15-21
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• 2009

Atmospheric pressure plasma equipment was successfully applied to the flip chip BGA manufacturing process to improve the uniformity of flux printing process. The problem was characterized as shrinkage of the printed flux layer due to insufficient surface energy of the flip chip BGA substrate. To improve the hydrophilic characteristics of the flip chip BGA substrate, remote DBD type atmospheric pressure plasma equipment was developed and adapted to the flux print process. The equipment enhanced the surface energy of the substrate to reasonable level and made the flux be distributed over the entire flip chip BGA substrate uniformly. This research was the first adaptation of the atmospheric pressure plasma equipment to the flip chip BGA manufacturing process and a lot of possible applications are supposed to be extended to other PCB manufacturing processes such as organic cleaning, etc.

• Asian Pacific Journal of Cancer Prevention
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• 제16권6호
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• pp.2251-2256
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• 2015

To study effects of cellular FLICE (FADD-like IL-$1{\beta}$-converting enzyme)-inhibitory protein (c-FLIP) inhibition by RNA interference (RNAi) on sensitivity of U2OS cells to tumor necrosis factor (TNF)-related apoptosis-inducing ligand (TRAIL)-induced apoptosis, plasmid pSUPER-c-FLIP-siRNA was constructed and then transfected into U2OS cells. A stable transfection cell clone U2OS/pSUPER-c-FLIP-siRNA was screened from the c-FLIP-siRNA transfected cells. RT-PCR and Western blotting were applied to measure the expression of c-FLIP at the levels of mRNA and protein. The results indicated that the expression of c-FLIP was significantly suppressed by the c-FLIP-siRNA in the cloned U2OS/pSUPER-c-FLIP-siRNA as compared with the control cells of U2OS/pSUPER. The cloned cell line of U2OS/pSUPER-c-FLIP-siRNA was further examined for TRAILinduced cell death and apoptosis in the presence of a pan-antagonist of inhibitor of apoptosis proteins (IAPs) AT406, with or without 4 hrs pretreatment with rocaglamide, an inhibitor of c-FLIP biosynthesis, for 24 hrs. Cell death effects and apoptosis were measured by the methods of MTT assay with 3-(4,5-dimethylthiazol-2-yl)-2,5-diphenyltetrazolium bromide and flow cytometry, respectively. The results indicated that TRAIL-induced cell death in U2OS/pSUPER-c-FLIP-siRNA was increased compared with control cells U2OS/pSUPER in the presence or absence of AT406. Flow cytometry indicated that TRAIL-induced cell death effects proceeded through cell apoptosis pathway. However, in the presence of rocaglamide, cell death or apoptotic effects of TRAIL were similar and profound in both cell lines, suggesting that the mechanism of action for both c-FLIP-siRNA and rocaglamide was identical. We conclude that the inhibition of c-FLIP by either c-FLIP-siRNA or rocaglamide can enhance the sensitivity of U2OS to TRAIL-induced apopotosis, suggesting that inhibition of c-FLIP is a good target for anti-cancer therapy.

• 한국컴퓨터그래픽스학회논문지
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• 제19권3호
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• pp.1-11
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• 2013

FLIP 기반의 유체 시뮬레이션은 품질에 대비 높은 효율을 자랑하기 때문에 Visual Effect(VFX)산업에 널리 사용되고 있다. FLIP 기술에서는 바다와 같은 대규모의 물을 시뮬레이션 할 때 시각적으로 중요하지 않은 물의 안쪽까지도 파티클을 할당해야 하기 때문에 보이는 파티클보다 보이지 않는 파티클의 개수가 훨씬 많은 경우에는 시뮬레이션 작업의 효율성이 떨어진다. 본 논문에서는 이러한 단점을 보완하기 위하여 레벨셋 (Level Set)과 Fluid Implicit Particle(FLIP) 기반의 유체 시뮬레이션 기법을 혼합(hybrid)한 효율적인 유체 시뮬레이션 기법을 제안한다. 파티클들을 물의 안쪽 표면 근처의 얇은 층에만 배치함으로써 사용되는 파티클의 갯수를 줄여서 결과적으로 시뮬레이션의 효율성을 크게 높일 수 있었다. 또한 [1]의 표면 재구성 기법과 moving least squares(MLS) [2] 기법을 결합한 새로운 유체 표면 재구성 기법을 적용하여 FLIP을 통해 격자(Grid) 기반 시뮬레이션에서 발생하는 수치적 소실을 줄이고 동시에 유체의 부드러운 표면을 유지할 수 있다. 본 논문의 혼합 시뮬레이션 기술은 높은 품질의 유체 시뮬레이션을 효율적으로 수행하여 다양한 규모의 유체를 표현할 수 있었다.

• 한국정보과학회논문지:정보통신
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• 제36권1호
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• pp.24-33
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• 2009

패치-스티치(patch-and-stitch) 기법을 사용하는 위치추정 알고리즘에서 발생하는 플립오류는 두 패치를 하나의 좌표계로 통합하는 과정에서 패치가 잘못 뒤집혀 병합되는 경우에 발생한다. 본 논문은 플립오류의 발생을 억제하는 앵커프리(anchor free) 패치-스티치 위치추정 알고리즘을 제안한다. 제안하는 알고리즘은 두 단계를 거쳐서 플립 오류의 가능성을 제거한다. 첫째, 각각의 인접한 패치 쌍에 대해서 플립모호성(flip ambiguity) 검사를 통해 플립오류의 발생가능성이 높은 패치 쌍을 찾아낸다. 둘째, 전역적인 수준에서 플립충돌(flip conflict) 검사를 통해 플립 오류의 가능성이 높은 패치 쌍을 찾아낸다. 시뮬레이션을 통한 성능 평가는 제안하는 알고리즘이 기존 것에 비해 더 우수한 위치추정이 가능함을 보여준다.