• Title/Summary/Keyword: Extendable

Search Result 75, Processing Time 0.026 seconds

Cloud Computing in the Vulnerability Analysis for Personal Information Security (Cloud Computing의 개인 정보 보안을 위한 취약점 분석)

  • Sun, Jae-Hoon;Kim, Kui-Nam J.
    • Convergence Security Journal
    • /
    • v.10 no.4
    • /
    • pp.77-82
    • /
    • 2010
  • Cloud computing is defined as numerous concepts by research institutions and scholars. However, due to the present business trend in the IT sector, emphasizing on cost and efficiency, cloud computing has been defined as a form of computing which can provide extendable mass storage components in the virtual environment. As a result, security issues have been arising due to the variety of cloud computing services provided by the industries. This paper aims to analyze the weaknesses such as security techniques and inquiries, and personal information protection required for various cloud computing services.

Recovery Method Using Extendable Hashing Based Log in A Shared-Nothing Spatial Database Cluster (비공유 공간 데이터베이스 클러스터에서 확장성 해싱 기반의 로그를 이용한 회복 기법)

  • 장일국;장용일;박순영;배해영
    • Proceedings of the Korean Association of Geographic Inforamtion Studies Conference
    • /
    • 2004.03a
    • /
    • pp.7-10
    • /
    • 2004
  • 회복기법은 비공유 공간 데이터베이스 클러스터에서 고가용성을 위해 매우 중요하게 고려되고 있다. 일반적으로 데이터베이스 클러스터의 회복기법은 노드의 오류가 발생한 경우 로컬 로그와는 별도로 클러스터 로그를 생성하며, 이를 기반으로 해당 노드에서의 회복과정을 수행한다. 그러나, 기존의 기법은 하나의 레코드를 위해 다수의 갱신정보를 유지함으로써 클러스터 로그의 크기가 증가되고, 전송비용이 증가된다. 이는 회복노드에서 하나의 레코드에 대해 털러 번의 불필요한 연산을 실행하여 회복시간이 증가되고, 전체적인 시스템의 부하를 증가시키는 문제를 발생시킨다. 본 논문에서는 비공유 공간 데이터베이스 클러스터에서 확장성 해싱 기반의 로그를 이용한 회복기법을 제안한다. 제안기법에서의 클러스터 로그는 레코드 키값을 이용한 확장성 해싱을 기반으로 레코드의 변경사항과 실제 데이터를 가리키는 포인터 정보로 구성된다. 확장성 해싱 기반의 클러스터 로그는 크기와 전송비용이 감소하며, 회복노드는 하나의 레코드에 대해 한번의 갱신연산만 실행하므로 빠른 회복이 가능하다. 따라서 제안 기법은 확장성 해싱 기반의 클러스터 로그를 이용하여 효율적인 회복처리를 수행하며, 시스템의 가용성을 향상시킨다.

  • PDF

An automatic motorized feeder pipe inspection robot (자율 주행형 급수 배관 검사)

  • Choi, Chang-Hwan;Jeon, Pung-Woo;Choi, Yong-Je;Jeong, Seung-Ho;Kim, Seung-Ho
    • Proceedings of the KSME Conference
    • /
    • 2004.04a
    • /
    • pp.816-821
    • /
    • 2004
  • The outlet feeder pipe thinning in a PHWR (Pressured Heavy Water Reactor) is caused by high pressure steam flow inside the pipe, which is a well known degradation mechanism called FAC (Flow Assisted Corrosion). In order to monitor the degradation, the thickness of the outlet bends closed to the exit of the pressure tube should be measured and analyzed at every official overhaul. This paper develops an automatic feeder pipe inspection system that can minimize the irradiation dose by automating the measurement process. The robot can move by itself on the feeder pipe by using an inch worm mechanism, which is constructed by two gripper bodies that can fix their body on the pipe and one extendable and retractable body connected the two gripper bodies to move forward and backward.

  • PDF

Interaction using Speech and a Virtual Stick in a CAVE

  • Fujishiro, Kanzan;Takahashi, Hiroki;Nakajima, Masayuki
    • Proceedings of the Korean Society of Broadcast Engineers Conference
    • /
    • 1999.06a
    • /
    • pp.207-212
    • /
    • 1999
  • In VEs (virtual environments) such as a CAVE system, there are three important operations : executive command decision, object selection and 3-D (three-dimensional) pointing. It is necessary to implement these operations in VEs intuitively and accessibly. In CAVE, it is possible for examines to walk and change their viewpoints freely. Then, the input devices which have excellent portability and rich expression are desired. Speech input satisfies both requirements. It is, however, very difficult for the speech input to indicate an exact point in 3-D space. Therefore, an extendable virtual stick is employed and it supports speech input. This paper proposes a user friendly interface using speech and a virtual stick in CAVE system. In this paper, several applications appropriate for the proposed interface are developed. Some problems are pointed out from the applications.

WHEN IS C(X) AN EM-RING?

  • Abuosba, Emad;Atassi, Isaaf
    • Communications of the Korean Mathematical Society
    • /
    • v.37 no.1
    • /
    • pp.17-29
    • /
    • 2022
  • A commutative ring with unity R is called an EM-ring if for any finitely generated ideal I there exist a in R and a finitely generated ideal J with Ann(J) = 0 and I = aJ. In this article it is proved that C(X) is an EM-ring if and only if for each U ∈ Coz (X), and each g ∈ C* (U) there is V ∈ Coz (X) such that U ⊆ V, ${\bar{V}}=X$, and g is continuously extendable on V. Such a space is called an EM-space. It is shown that EM-spaces include a large class of spaces as F-spaces and cozero complemented spaces. It is proved among other results that X is an EM-space if and only if the Stone-Čech compactification of X is.

A 16 bit FPGA Microprocessor for Embedded Applications (실장제어 16 비트 FPGA 마이크로프로세서)

  • 차영호;조경연;최혁환
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.5 no.7
    • /
    • pp.1332-1339
    • /
    • 2001
  • SoC(System on Chip) technology is widely used in the field of embedded systems by providing high flexibility for a specific application domain. An important aspect of development any new embedded system is verification which usually requires lengthy software and hardware co-design. To reduce development cost of design effort, the instruction set of microprocessor must be suitable for a high level language compiler. And FPGA prototype system could be derived and tested for design verification. In this paper, we propose a 16 bit FPGA microprocessor, which is tentatively-named EISC16, based on an EISC(Extendable Instruction Set Computer) architecture for embedded applications. The proposed EISC16 has a 16 bit fixed length instruction set which has the short length offset and small immediate operand. A 16 bit offset and immediate operand could be extended using by an extension register and an extension flag. We developed a cross C/C++ compiler and development software of the EISC16 by porting GNU on an IBM-PC and SUN workstation and compared the object code size created after compiling a C/C. standard library, concluding that EISC16 exhibits a higher code density than existing 16 microprocessors. The proposed EISC16 requires approximately 6,000 gates when designed and synthesized with RTL level VHDL at Xilinix's Virtex XCV300 FPGA. And we design a test board which consists of EISC16 ROM, RAM, LED/LCD panel, periodic timer, input key pad and RS-232C controller. 11 works normally at 7MHz Clock.

  • PDF

Low-Gate-Count 32-Bit 2/3-Stage Pipelined Processor Design (소면적 32-bit 2/3단 파이프라인 프로세서 설계)

  • Lee, Kwang-Min;Park, Sungkyung
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.53 no.4
    • /
    • pp.59-67
    • /
    • 2016
  • With the enhancement of built-in communication capabilities in various meters and wearable devices, which implies Internet of things (IoT), the demand of small-area embedded processors has increased. In this paper, we introduce a small-area 32-bit pipelined processor, Juno, which is available in the field of IoT. Juno is an EISC (Extendable Instruction Set Computer) machine and has a 2/3-stage pipeline structure to reduce the data dependency of the pipeline. It has a simple pipeline controller which only controls the program counter (PC) and two pipeline registers. It offers $32{\times}32=64$ multiplication, 64/32=32 division, $32{\times}32+64=64$ MAC (multiply and accumulate) operations together with 32*32=64 Galois field multiplication operation for encryption processing in wireless communications. It provides selective inclusion of these algebraic logic blocks if necessary in order to reduce the area of the overall processor. In this case, the gate count of our integer core amounts to 12k~22k and has a performance of 0.57 DMIPS/MHz and 1.024 Coremark/MHz.

A Scheme of the Distributed Path Assignment in Network with Hierarchical Topology (계층적 망구조에서의 분산 경로 설정 방안)

  • 김형철;홍충선;이대영
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.25 no.5B
    • /
    • pp.925-930
    • /
    • 2000
  • The Problem of allocating paths is very significant in order to transmit a large amount of various data on the ATM network. Therefore, selecting an optimal path among available paths between the a source node and a target node has been researched. Alternate paths designed in previous PNNI routing is not considered on the group-occupation so that traffic congestion happens, when errors occur in the network which consists of a hierarchical network architecture extendable to a large network, We propose the Top-Down algorithm considering an average of the occupation among the groups reported from a leader node in each group and minimizing a traffic congestion

  • PDF

A Study on the Design of Smart Community Spaces in Housing Complex (아파트 거주자들을 위한 스마트 컴뮤니티 디자인에 관한 연구)

  • Cho, Myung-Eun;Chae, Hee-Hwa;Kim, Mi-Jeong
    • Korean Institute of Interior Design Journal
    • /
    • v.21 no.1
    • /
    • pp.159-169
    • /
    • 2012
  • One of critical issues in the housing area is what strategies should be adopted for revitalizing contemporary communities in housing complex. It is expected that those strategies could encourage neighbourship and recover the existing community spaces. Based on the assumption that contemporary communities might have different characteristics from those of the traditional communities and spaces, this research aims to explore the possibility of new communities in a current context. With the development of the information communication technologies (ICT) and hardware systems, the environment would be capable of anticipating people's needs and then provide them with customization options to tailor the environment to their requirements. By incorporating the 'smart' paradigm, this paper introduces the concept of a smart community and space with the potential of mobile Augmented Reality(AR) as alternative strategies for activating the communities. The residents believe that existing common spaces need to be extendable and augmented by combining new technologies. The smart communities and spaces are expected to extend people's interaction to virtual world in aj real context, further combined with social network, it enables sustainable relationships among residents, contributina to a new type of community.

  • PDF

DYNAMIC MODELING AND ANALYSIS OF VEHICLE SMART STRUCTURES FOR FRONTAL COLLISION IMPROVEMENT

  • Elemarakbi, A.M.;Zu, J.W.
    • International Journal of Automotive Technology
    • /
    • v.5 no.4
    • /
    • pp.247-255
    • /
    • 2004
  • The majority of real world frontal collisions involves partial overlap (offset) collision, in which only one of the two longitudinal members is used for energy absorption. This leads to dangerous intrusions of the passenger compartment. Excessive intrusion is usually generated on the impacted side causing higher contact injury risk on the occupants compared with full frontal collision. The ideal structure needs to have extendable length when the front-end structure is not capable to absorb crash energy without violating deceleration pulse requirements. A smart structure has been proposed to meet this ideal requirement. The proposed front-end structure consists of two hydraulic cylinders integrated with the front-end longitudinal members of standard vehicles. The work carried out in this paper includes developing and analyzing mathematical models of two different cases representing vehicle-to-vehicle and vehicle-to-barrier in full and offset collisions. By numerical crash simulations, this idea has been evaluated and optimized. It is proven form numerical simulations that the smart structures bring significantly lower intrusions and decelerations. In addition, it is shown that the mathematical models are valid, flexible, and can be used in an effective way to give a quick insight of real life crashes.