• Title/Summary/Keyword: Execution function

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The Property of Software Optimal Release Time Based on Log Poission Execution Time Model Using Interval Failure Times (고장 간격 수명 시간을 이용한 로그 포아송 실행 시간 모형의 소프트웨어 최적방출시간 특성에 관한 연구)

  • Sin, Hyun-Cheul;Kim, Hee-Cheul
    • Convergence Security Journal
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    • v.10 no.1
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    • pp.55-61
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    • 2010
  • It is of great practical interest to deciding when to stop testing a software system in development phase and transfer it to the user. This decision problem called an optimal release policies. In this paper, because of the possibility of introducing new faults when correcting or modifying the software, we were researched release comparative policies which based on infinite failure NHPP model and types of interval failure times. The policies which minimize a total average software cost of development and maintenance under the constraint of satisfying a software reliability requirement can optimal software release times. In a numerical example, applied data which were patterns, if intensity function constant or increasing, decreasing, estimated software optimal release time.

Task-Level Dynamic Voltage Scaling for Embedded System Design: Recent Theoretical Results

  • Kim, Tae-Whan
    • Journal of Computing Science and Engineering
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    • v.4 no.3
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    • pp.189-206
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    • 2010
  • It is generally accepted that dynamic voltage scaling (DVS) is one of the most effective techniques of energy minimization for real-time applications in embedded system design. The effectiveness comes from the fact that the amount of energy consumption is quadractically proportional to the voltage applied to the processor. The penalty is the execution delay, which is linearly and inversely proportional to the voltage. According to the granularity of tasks to which voltage scaling is applied, the DVS problem is divided into two subproblems: inter-task DVS problem, in which the determination of the voltage is carried out on a task-by-task basis and the voltage assigned to the task is unchanged during the whole execution of the task, and intra-task DVS problem, in which the operating voltage of a task is dynamically adjusted according to the execution behavior to reflect the changes of the required number of cycles to finish the task before the deadline. Frequent voltage transitions may cause an adverse effect on energy minimization due to the increase of the overhead of transition time and energy. In addition, DVS needs to be carefully applied so that the dynamically varying chip temperature should not exceed a certain threshold because a drastic increase of chip temperature is highly likely to cause system function failure. This paper reviews representative works on the theoretical solutions to DVS problems regarding inter-task DVS, intra-task DVS, voltage transition, and thermal-aware DVS.

Design and Implementation of ECMAScript Interpreter for VXML Execution (VXML 수행을 위한 ECMAScript 인터프리터의 설계 및 구현)

  • Shin, Dong-Hyeok;Yun, Young-Sun;Eun, Sung-bae
    • The KIPS Transactions:PartA
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    • v.10A no.2
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    • pp.101-110
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    • 2003
  • ECMAScript can support VXML in utilizing the system information, analysis of complex equation, iterative execution, declaration of functions and their call, etc. However, since the ECMAScript is the standard script language for Internet, there is no way that the script lithely connects with VXML. In this paper, we presented the design and implemented the interpreter that meets the requirement of ECMAScript for its flexible connection with VXML. For connections, we added some functions in modified ECMAScript : management of VXML variables, execution of system functions, analysis of equations and function calls. From the result of connection, it is shown that new ECMAScript can handle the various algorithms of VXML.

Limits on the efficiency of event-based algorithms for Monte Carlo neutron transport

  • Romano, Paul K.;Siegel, Andrew R.
    • Nuclear Engineering and Technology
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    • v.49 no.6
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    • pp.1165-1171
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    • 2017
  • The traditional form of parallelism in Monte Carlo particle transport simulations, wherein each individual particle history is considered a unit of work, does not lend itself well to data-level parallelism. Event-based algorithms, which were originally used for simulations on vector processors, may offer a path toward better utilizing data-level parallelism in modern computer architectures. In this study, a simple model is developed for estimating the efficiency of the event-based particle transport algorithm under two sets of assumptions. Data collected from simulations of four reactor problems using OpenMC was then used in conjunction with the models to calculate the speedup due to vectorization as a function of the size of the particle bank and the vector width. When each event type is assumed to have constant execution time, the achievable speedup is directly related to the particle bank size. We observed that the bank size generally needs to be at least 20 times greater than vector size to achieve vector efficiency greater than 90%. When the execution times for events are allowed to vary, the vector speedup is also limited by differences in the execution time for events being carried out in a single event-iteration.

SoC Virtual Platform with Secure Key Generation Module for Embedded Secure Devices

  • Seung-Ho Lim;Hyeok-Jin Lim;Seong-Cheon Park
    • Journal of Information Processing Systems
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    • v.20 no.1
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    • pp.116-130
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    • 2024
  • In the Internet-of-Things (IoT) or blockchain-based network systems, secure keys may be stored in individual devices; thus, individual devices should protect data by performing secure operations on the data transmitted and received over networks. Typically, secure functions, such as a physical unclonable function (PUF) and fully homomorphic encryption (FHE), are useful for generating safe keys and distributing data in a network. However, to provide these functions in embedded devices for IoT or blockchain systems, proper inspection is required for designing and implementing embedded system-on-chip (SoC) modules through overhead and performance analysis. In this paper, a virtual platform (SoC VP) was developed that includes a secure key generation module with a PUF and FHE. The SoC VP platform was implemented using SystemC, which enables the execution and verification of various aspects of the secure key generation module at the electronic system level and analyzes the system-level execution time, memory footprint, and performance, such as randomness and uniqueness. We experimentally verified the secure key generation module, and estimated the execution of the PUF key and FHE encryption based on the unit time of each module.

Study on the Execution of Green Logistics and Supply Chain Integration for by 3PL for Manufacturing Companies (3PL을 활용한 제조기업 공급사슬통합 및 녹색물류 실행을 위한 실증적 연구)

  • Lim, Janghyuk;Han, Young-Geun
    • Journal of the Korea Safety Management & Science
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    • v.15 no.4
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    • pp.233-243
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    • 2013
  • As companies were concerned with developing green logistics and environment, most logistics concerned functions like packaging, loading, storage, transportation and IT studies are active in study. Even if active in research studies, companies still recognized that logistics cost increases as green concepts are applied. For the efficient execution of green logistics management, it is absolutely necessary but difficult to build an optimal logistics system where each function is smoothly interacted through the proper integration and the link of various logistics functions and partners. This study aims to development of green logistics through integration of supply chain functions and partners. With this aim of study, case studies with analysis of embodiment, planning and operations for supply chain of companies are carried out.

Fast Logic Minimization Algorithm for Programmable-Logic-Array Design (PLA 설계용 고속 논리최소화 알고리즘)

  • 최상호;임인칠
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.2
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    • pp.25-30
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    • 1985
  • This paper proposes an algorithm to simplify Boolean functions into near minimal sum-of-products for Programmable Logic Arrays. In contrast to the conventional procedures, where the execution time depends on the number of variables, the execution time by this procedure depends on the degree of consensus of base minterms. Thus as the number of variables is increased, the difference of CPU time becomes larger using this new Procedure than using other procedures and consequently the executable range of input function increasing. The algorithm has been implemented on CYEER 170-740 and it's results were compared with those using Arvalo's algorithm.

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Development of a Software PLC for PC Based on IEC 61131-3 Standard (IEC 61131-3 표준을 따른 PC용 소프트웨어 PLC의 개발)

  • Lee, Cheol-Soo;Jeong, Gu;Lee, Je-Phil;Sim, Ju-Hyun
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.11 no.1
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    • pp.61-69
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    • 2002
  • This paper describes a converting algorithm between programmable languages of a software PLU. It is based on IEC 61131-3 standard and PC. The proposed control logic is designed by the software model and common element with data type, variables, POUs(program organization unit) and execution control unit commonly used within programmable languages of IEC 61131-3 Standard. The generation method of object file is proposed on five programmable language based on IEC 61131-3. It is represented as fo11ows; 1) the generation method using conversion algorithm from LD to IL with FBD(function block diagram), 2) the generation method using f code generation algorithm from SFC using the SFC execution sequence with FBD and ST(structured text). The proposed control logic generator was implemented by Visual C++ 6.0 and MFC on MS-windows NT 4.0.

A Study on the Control of Macro-Micro Robotic Systems (마크로-마이크로 로보트의 제어에 관한 연구)

  • 주진화;명지태;박의열;이장명
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.9
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    • pp.47-56
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    • 1994
  • In this paper, we demonstrate how to design a redundant robot which is suitable for the multiple task execution without any constraints on the work space. The implementation is possible by the rigid connection of a cacro-robot and a micro-robot. A 5 d.o.f. articulated robor designed for commercial purpose is utilized as a micro-robot which can perform a general task with the appropriate adjustment of its base location. The base of a micro-robot is located at a suitable position by the macro-robot designed and implemented through this research. A task assigned to this redundant robot is performed mainly by the micro-robot. However, when the micro-robot cannot perform the task by itself or when the micro-robot has difficulties in performing the task, the coordination of the macro-robot is requited. To monitor the task execution efficiency of the micro-robot, we used the 'Manipulability Measure' as a cost function. The coordination between the two robots are verified both by the simulation and the experiment.

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The question at issue of connector wire in High Speed Railway Catenary System of France (프랑스 고속철도 전차선로 시스템에서 균압선의 문제점)

  • 안영훈
    • Proceedings of the KSR Conference
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    • 2000.11a
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    • pp.636-651
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    • 2000
  • In these days, SNCF replace the connector wire (M-T type) with a dropper has a equivalent role and function of the one in general lines of TGV, and change the connector wire (T-T-M-M-T-T, T-T-M-M-T type, etc) into a New one has more flexible cable in parallel lines (air section air joint, etc) of TGV. The Connector wire has many problems according to a flow of excessive circulation current (or traction current) and a sudden rise of temperature on catenary when electric locomotive is running in high speed. To solve the question at issue of the connector wire in high speed railway catenary system of Fiance, SNCF return their operating experience in TGV lines to design and execution of catenary system Therefore, we have to deal with the question in design and execution of catenary system for kyoungbu HSR line because we will spend a lot of time and more money for maintenance than for construction of that.

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