• Journal of Sensor Science and Technology
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• v.32 no.5
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• pp.328-333
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• 2023

This study experimentally verified the etch rate of the SiO₂ sacrificial layer etching process with a single etch hole using vapor-phase hydrogen fluoride (VHF) etching. To fabricate small-sized polysilicon etch holes, both circular and triangular pattern masks were employed. Etch holes were fabricated in the polysilicon thin film on the SiO₂ sacrificial layer, and VHF etching was performed to release the polysilicon thin film. The lateral etch rate was measured for varying etch hole sizes and sacrificial layer thicknesses. Based on the measured results, we obtained an approximate equation for the etch rate as a function of the etch hole size and sacrificial layer thickness. The etch rates obtained in this study can be utilized to minimize structural damage caused by incomplete or excessive etching in sacrificial layer processes. In addition, the results of this study provide insights for optimizing sacrificial layer etching and properly designing the size and spacing of the etch holes. In the future, further research will be conducted to explore the formation of structures using chemical vapor deposition (CVD) processes to simultaneously seal etch hole and prevent adhesion owing to polysilicon film vibration.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.284-285
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• 2007

In this paper, we present the effect on a novel transmission line filter response by the etch hole position on the suspended ground and the residue on the resonator under ground plane. We defined the etch hole offset as the distance from the sidewall of the suspended ground to the nearest side of the etch holes. We simulated new filter responses to reflect the real value of the changed etch hole offset caused by characteristics of negative photoresist. Return loss is distorted by the residue on the center conductor remained after sacrificial layer removing. By comparison of simulation and measurements, we concluded the residue on the resonator distorted the RF response worse than etch hole offset variation did.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.244-250
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• 2008

An inductively coupled plasma etching process to replace an existing slower rate reactive ion etching process for $60{\mu}m$ diameter via-holes using Cl2/BCl3 gases has been investigated. Process pressure and platen power were varied at a constant ICP coil power to reproduce the RIE etched $200{\mu}m$ deep via profile, at high etch rate. Desired etch profile was obtained at 40 m Torr pressure, 950 W coil power, 90W platen power with an etch rate ${\sim}4{\mu}m$/min and via etch yield >90% over a 3-inch wafer, using $24{\mu}m$ thick photoresist mask. The etch uniformity and reproducibility obtained for the process were better than 4%. The metallized via-hole dc resistance measured was ${\sim}0.5{\Omega}$ and via inductance value measured was $\sim$83 pH.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.472-472
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• 2011

The capacitive coupled plasma (CCP) has been extensively used in the semiconductor industry because it has not only good uniformity, but also low electron temperature. But CCP source has some problems, such as difficulty in varying the ion bombardment energy separately, low plasma density, and high processing pressure, etc. In this reason, dual frequency CCP has been investigated with a separate substrate biasing to control the plasma parameters and to obtain high etch rate with high etch selectivity. Especially, in this study, we studied on the etching of $SiO_2$ by using the pulse-time modulation in the dual-frequency CCP source composed of 60 MHz/ 2 MHz rf power. By using the combination of high /low rf powers, the differences in the gas dissociation, plasma density, and etch characteristics were investigated. Also, as the size of the semiconductor device is decreased to nano-scale, the etching of contact hole which has nano-scale higher aspect ratio is required. For the nano-scale contact hole etching by using continuous plasma, several etch problems such as bowing, sidewall taper, twist, mask faceting, erosion, distortions etc. occurs. To resolve these problems, etching in low process pressure, more sidewall passivation by using fluorocarbon-based plasma with high carbon ratio, low temperature processing, charge effect breaking, power modulation are needed. Therefore, in this study, to resolve these problems, we used the pulse-time modulated dual-frequency CCP system. Pulse plasma is generated by periodical turning the RF power On and Off state. We measured the etch rate, etch selectivity and etch profile by using a step profilometer and SEM. Also the X-ray photoelectron spectroscopic analysis on the surfaces etched by different duty ratio conditions correlate with the results above.

• Journal of the Semiconductor & Display Technology
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• v.2 no.3
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• pp.7-11
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• 2003

In this research, the etching characteristics of via contact and deep contact hole have been studied using multi-pole inductively coupled plasma(MICP) etching system. We investigated Plasma density of MICP source using the Langmuir probe and etching characteristics with RF frequency, wall temperature, chamber gap, and gas chemistry containing Carbon and Fluorine. As the etching time increases, formation of the polymer increases. To improve the polymer formation, we controlled the temperature of the reacting chamber, and we found that temperature of the chamber was very effective to decrease the polymer thickness. The deep contact etch profile and high selectivity(oxide to photoresist) have been achieved with the optimum mixed gas ratio containing C and F and the temperature control of the etching chamber.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2003.05a
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• pp.12-17
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• 2003

본 연구에서는 MICP Etching system 을 이용한 Via contact 및 Deep contact hole etch process 특성을 연구하였다. Langmuir probe 를 이용한 MICP source 의 Plasma density & electron temperature 측정하였고 탄소와 플로우르를 포함하는 혼합 Plasma 를 형성하여 RF frequency, wall temperature, chamber gap, gas chemistry 등의 변화에 따른 식각 특성을 조사하였다. Plasma density 는 1000w 에서 $10^{11}$/$cm^3$ 이상의 high density plasma와 uniform plasma 형성을 확인하였고 $CH_{2}F_{2}$와 CO의 적절한 혼합비를 이용하여 Oxide to PR 선택비가 10 이상인 고선택비 조건을 확보하였다. 고선택비 형성에 따라 Polymer 형성이 많이 되었고 이를 개선하기 위하여 반응 챔버의 온도 조절을 통하여 Polymer 증착 방지에 효과적인 것을 확인하였다. MICP source를 이용하여 탄소와 플로우르의 혼합 가스와 식각 챔버의 온도 조절에 의한 선택비 증가를 확보하여 High Aspect Ratio Contact Hole Etch 가능성을 확보하였다.

• Journal of Electrical Engineering and Technology
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• v.6 no.2
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• pp.280-283
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• 2011

In the present work, a new approach is proposed for via interconnects of semiconductor devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. In order to implement a selective growth of carbon nanotubes (CNTs) for via interconnect, the buried catalyst method is selected which is the most compatible with semiconductor processes. The cobalt catalyst for CNT growth is pre-deposited before via hole patterning, and to achieve the via etch stop on the thin catalyst layer (ca. 3nm), a novel 2-step etch scheme is designed; the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to lower the damage of the catalyst layer. The results show that the 2-step etch scheme is a feasible candidate for the realization of CNT interconnects in conventional semiconductor devices.

• Journal of Electrical Engineering and Technology
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• v.6 no.2
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• pp.233-238
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• 2011

In the present work, a new approach is proposed for via interconnects of semiconductor devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. In order to implement a selective growth of carbon nanotubes (CNTs) for via interconnect, the buried catalyst method is selected which is the most compatible with semiconductor processes. The cobalt catalyst for CNT growth is pre-deposited before via hole patterning, and to achieve the via etch stop on the thin catalyst layer (ca. 3nm), a novel 2-step etch scheme is designed; the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to lower the damage of the catalyst layer. The results show that the 2-step etch scheme is a feasible candidate for the realization of CNT interconnects in conventional semiconductor devices.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.4
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• pp.32-38
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• 2004

Laser-induced thermochemical wet etching of titanium in phosphoric acid has been investigated to examine the feasibility of this method fur fabrication of microstructures. Cutting, drilling, and milling of titanium foil were carried out while examining the influence of process parameters on etch width, etch depth, and edge straightness. Laser power, scanning speed of workpiece, and etchant concentration were chosen as major process parameters influencing on temperature distribution and reaction rate. Etch width increased almost linearly with laser power showing little dependence on scanning speed while etch depth showed wide variation with both laser power and scanning speed. A well-defined etch profile with good surface quality was obtained at high concentration condition. Fabrication of a hole, micro cantilever beam, and rectangular slot with dimension of tess than 100${\mu}{\textrm}{m}$ has been demonstrated.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.92.2-92.2
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• 2015

Negative-AND (NAND) flash의 대용량 및 소형화로 인해 10 nm급 공정을 도입한 128 Gb NAND flash가 개발된 이래, 공정이 미세화되면서 셀이 작이지고 간격이 좁아지게 되었다. 이로 인해 전자가 누설되는 간섭현상이 심화되게 된다. 이러한 문제를 해결하기 위해 기존 NAND의 평면 구조를 수직으로 적층하는 3D NAND 기술이 개발되었으며 차세대 소자를 위한 필수 기술로 각광받고 있다. 3D NAND에서 channel hole etching시 고 선택 비의 중요도가 증가하여 증착막 보호 역할을 하는 hardmask의 두께가 증가하게 되었으며 기존 하드마스크 대비 내식각성이 2배 이상 향상된 hard material 개발이 필요한 실정이다. 본 연구에서는 dopant에 따른 amorphous carbon layer (ACL)의 etch rate의 변화량을 Raman spectroscopy등의 측정장비를 이용하여 비교분석 하였다. dopant의 각각 유량별에 대한 etch rate 변화의 영향성을 비교하였다. dopant의 유량에 따라 etch rate이 변화하는 것을 관찰할 수 있었으며, 2000 sccm 이후에는 etch rate이 급격히 감소하는 경향을 보였다. Raman 측정결과, etch rate의 감소에 따라 G-peak의 red shift가 발생하였으며 두 peak 간의 차이 값이 etch rate의 변화율과 유사한 경향을 보이는 것을 확인하였다.