• Title/Summary/Keyword: Error correction

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Precise open-loop positioning using LPM with error correction

  • Furuhashi, Hideo;Shingu, Hiroyasu;Hayashi, Niichi;Watanabe, Shigeo;Sumi, Tetsuo;Uchida, Yoshiyuki
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1995년도 Proceedings of the Korea Automation Control Conference, 10th (KACC); Seoul, Korea; 23-25 Oct. 1995
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    • pp.211-214
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    • 1995
  • A precise open-loop positioning system using linear pulse motor has been developed. The system is operated in a microstepping mode by controlling the electric current. One step of 508 .mu.m (tooth pitch of the linear pulse motor) is divided into 508 micro-steps equally. The displacement is measured with a system using a Fiezeau-type interferometer. Periodical positioning error with a period of the tooth pitch was observed in this system. Therefore, the position is corrected using the error. The error is stored into computer in advance, and the microstep current is corrected on basis of the stored data. Although the positioning error of the system without the correction was .+-.4.5 .mu.m, that with the correction was decreased to .+-.1.0 .mu.m.

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A Practical Voltage Error Correction Technique for Distribution System under Distribution Automation Environment

  • Aslam, Muhammad;Kim, Hyung-Seung;Choi, Myeon-Song;Lee, Seung-Jae
    • Journal of Electrical Engineering and Technology
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    • 제13권2호
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    • pp.669-676
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    • 2018
  • Transmission system has been well studied since long time and power system techniques of distribution system are more or less derived from transmission system. However, unlike transmission systems, many practical issues are encountered in the distribution system. Considerable amount of error is observed in voltage obtained from the Feeder Remote Terminal Units (FRTUs) measured by the pole mounted PTs along the distribution feeder. Load uncertainty is also an issue in distribution system. Further, penetration of Distributed Generators (DGs) creates voltage variations in the system. Hybrid radial/ loop distribution system also make it complicated to handle distribution system. How these constraints to be handled under Distribution Automation (DAS) environment in order to obtain error free voltage is described in this paper and therefore, a new approach of voltage error correction technique has been proposed. The proposed technique utilizes reliable data from substation and the FRTUs installed in DAS. The proposed technique adopts an iterative process for voltage error correction. It has been tested and proved accurate not only for conventional radial systems but also for loop distribution systems.

유압식 구동장치의 서보밸브 오프셋 보정 방법에 관한 실험적 연구 (An Experimental Research of Servo Valve Offset Correction Method of Hydraulic Actuator)

  • 반준혁
    • 드라이브 ㆍ 컨트롤
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    • 제16권2호
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    • pp.72-79
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    • 2019
  • Despite the development of electronic components and microprocessors, hydraulic actuators are still being applied in various applications. In some applications, there is a desire to apply a hydraulic actuator with a relatively small position error to the system. Various studies have been conducted to reduce the position error of hydraulic actuators. In this paper, the position error of the hydraulic actuator when the hydraulic oil pressure is supplied is defined as the offset generated by the servo valve, and the method for correcting the servo valve offset has been studied. A method for compensating the servo valve offset was proposed and it was verified through experiments that the position error of the hydraulic actuator was reduced. We also compared the servo valve offset correction method and controller using the PID control and disturbance observer used to reduce the position error of the hydraulic actuator. No-load test and load test were performed to confirm the performance of the servo valve offset correction method. The results of the study were compared with those obtained by using the disturbance observer and PID control.

동기화 기능을 가지는 오차보정회로를 이용한 6비트 800MS/s CMOS A/D 변환기 설계 (Design of a 6bit 800MS/s CMOS A/D Converter Using Synchronizable Error Correction Circuit)

  • 김원;선종국;윤광섭
    • 한국통신학회논문지
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    • 제35권5A호
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    • pp.504-512
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    • 2010
  • 본 논문에서는 무선 USB 칩-셋 내 무선통신시스템단에 적용될 수 있는 6비트 800MS/s 플래쉬 A/D 변환기를 설계하였다. 기존의 A/D 변환기에서 서로 독립적으로 사용되던 오차보정회로단과 동기화단을 하나의 회로로 간소화 시켜서, 하드웨어에 대한 부담을 감소시켰다. 제안한 오차보정회로는 기존의 오차보정회로보다 MOS 트랜지스터의 수를 5개 감소시킬 수 있으며, 오차보정회로 한 개당 면적은 9% 정도 감소하게 된다. 설계된 A/D 변환기는 $0.18{\mu}m$ CMOS 1-poly 6-metal 공정으로 제작되었으며 측정 결과 입력 범위 0.8Vpp, 1.8V의 전원 전압에서 182mW의 전력 소모를 나타내었다. 800MS/s의 변환속도와 128.1MHz의 입력주파수에서 4.0비트의 ENOB을 나타내었다.

Soft Error Adaptable Deep Neural Networks

  • Ali, Muhammad Salman;Bae, Sung-Ho
    • 한국방송∙미디어공학회:학술대회논문집
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    • 한국방송∙미디어공학회 2020년도 추계학술대회
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    • pp.241-243
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    • 2020
  • The high computational complexity of deep learning algorithms has led to the development of specialized hardware architectures. However, soft errors (bit flip) may occur in these hardware systems due to voltage variation and high energy particles. Many error correction methods have been proposed to counter this problem. In this work, we analyze an error correction mechanism based on repetition codes and an activation function. We test this method by injecting errors into weight filters and define an ideal error rate range in which the proposed method complements the accuracy of the model in the presence of error.

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RC 고층 건물에서 계측 결과를 이용한 기둥축소 해석보정의 효과에 대한 변수 연구 (A Parametric Study on Effects of Column Shortening Analytical Correction Using Measured Results in RC Tall Buildings)

  • 송은석;김재요
    • 한국구조물진단유지관리공학회 논문집
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    • 제24권4호
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    • pp.38-47
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    • 2020
  • RC 고층건물에서 발생하는 기둥축소의 예측 오차를 최소화하기 위하여 계측결과를 이용한 해석보정에 대한 변수연구가 수행되었다. 해석보정의 변수는 해석보정 시행기준, 해석보정 값, 계측 위치이며, 변수에 따른 해석보정 모델을 41층 규모의 RC 건물의 시공단계해석에서 적용하여 변수에 따른 보정 효과를 비교·분석하였다. 보정 횟수와 전체 보정량에 따른 층별 오차 값의 감소율을 비교하였으며, 해석보정의 시행기준은 일정한 간격을 기준으로 해석보정 할 경우, 해석보정 값은 오차 값만큼 보정할 경우, 계측 위치는 매 층 계측이 될 경우에 오차가 최소화되는 경향을 확인하였다. 이로부터 실제 해석 모델에 대하여 여러 해석보정 모델을 적용함으로써 가장 적합한 해석보정 모델을 도출할 수 있음을 확인하였다.

행렬의 명제 문제에 대한 오류 분석 및 교정 지도 방안에 관한 연구 (A Study on Error Analysis and Correction Method in Proof Problems of Matrix)

  • 김혜진;김원경
    • 한국수학교육학회지시리즈A:수학교육
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    • 제49권2호
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    • pp.161-174
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    • 2010
  • The purpose of the study is to analyze various types of errors appeared in true-false proof problems of matrix and to find out correction method. In order to achieve this purpose, error test was conducted to the subject of 87 second grade students who were chosen from D high schoool. It was shown from this test that the most frequent error type was caused by the lack of understanding about concepts and essential facts of matrix(35.3%), and then caused by the invalid logically reasoning (27.4%), and then caused by the misusing conditions(18.7%). Through three hours of correction lessons with 5 students, the following correction teaching method was proposed. First, it is stressed that the operation rules and properties satisfied in real number system can not be applied in matrix. Second, it is taught that the analytical proof method and the reductio ad absurdum method are useful in the proof problem of matrix. Third, it is explained that the counter example of E=$\begin{pmatrix}1\;0\\0\;1 \end{pmatrix}$, -E should be found in proof of the false statement. Fourth, it is taught that the determinant condition should be checked for the existence of the inverse matrix.

자가 복구 오류 검출 및 정정 회로 적용을 고려한 최적 스크러빙 방안 (An Optimal Scrubbing Scheme for Auto Error Detection & Correction Logic)

  • 류상문
    • 제어로봇시스템학회논문지
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    • 제17권11호
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    • pp.1101-1105
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    • 2011
  • Radiation particles can introduce temporary errors in memory systems. To protect against these errors, so-called soft errors, error detection and correcting codes are used. In addition, scrubbing is applied which is a fundamental technique to avoid the accumulation of soft errors. This paper introduces an optimal scrubbing scheme, which is suitable for a system with auto error detection and correction logic. An auto error detection and correction logic can correct soft errors without CPU's writing operation. The proposed scrubbing scheme leads to maximum reliability by considering both allowable scrubbing load and the periodic accesses to memory by the tasks running in the system.

정전용량센서를 이용한 레이저 간섭계 오차보정 (Error Correction of Laser Interferometer Using Capacitive Sensor)

  • 김재천;서석현;전재욱;박기헌;유관호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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    • pp.342-344
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    • 2006
  • During last years, large investments have been directed to development and research of nano-technological products like semiconductor, display panel, optic-fiber communication components, life technology, and ultra-precision components. All quantitative measurements at nanometre scale should guarantees accurate results and high quality. Laser interferometer is one of most famous nanometre scale devices to be able to measure metre-scale distance with nanometre scale resolution, but it is easily affected by various error causes like geometrical, instrumental and environmental factor. On the other side, capacitive sensor is robust to above error factors, but it is able to measure relatively shorter distance, under $100{\mu}m$, than laser interferometer. New error correction method for laser interferometry using capacitive sensor will be introduced in this paper.

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자기검사 Pulse별 잉여수연산회로를 이용한 고신뢰화 Fault Tolerant 디지털필터의 구성에 관한 연구 (Implementation of High Reliable Fault-Tolerant Digital Filter Using Self-Checking Pulse-Train Residue Arithmetic Circuits)

  • 김문수;손동인;전구제
    • 대한전자공학회논문지
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    • 제25권2호
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    • pp.204-210
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    • 1988
  • The residue number system offers the possibility of high-speed operation and error detection/correction because of the separability of arithmetic operations on each digit. A compact residue arithmetic module named the self-checking pulse-train residue arithmetic circuit is effectively employed as the basic module, and an efficient error detection/correction algorithm in which error detection is performed in each basic module and error correction is performed based on the parallelism of residue arithmetic is also employed. In this case, the error correcting circuit is imposed in series to non-redundant system. This design method has an advantage of compact hardware. Following the proposed method, a 2nd-order recursive fault-tolerant digital filter is practically implemented, and its fault-tolerant ability is proved by noise injection testing.

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