• 제목/요약/키워드: Error amplifier

검색결과 311건 처리시간 0.02초

선형 OTA를 이용한 사인파 동조형 전압-제어 발전기 (A sinusoidal tuned VCO using linear OTA's)

  • 박지만;정원섭
    • 전자공학회논문지B
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    • 제33B권7호
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    • pp.80-85
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    • 1996
  • A sinusoidal tuned VCO based on linear OTA's has been designed for instrumentation and measurement applications. It consists of a noniverting amplifier, a hard limiter, and a current controlable LC-tuned circuit which is realized vy two linear OTA's and two grounded capacitors. A prototype circuit has been built with discrete components. The experimental results show that the proposed VCO has a linearity error of less than 6.5 percent and a temperature coefficient of less than 200ppm/$^{\circ}C$ over a bias current range form 5$\mu$A to 100 $\mu$A(or an oscillation frequency range form 775.5 Hz to 20.371 kHz). A total harmonic distortion of 0.6 percent was measured for a peak-to-peak amplitude of 5V.

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MRRC 안테나 기법을 이용한 MC-DS-CDMA 전송방식의 성능 분석 (Performance Evaluation of MC-DS-CDMA Transmission Technique using MRRC Antenna Scheme)

  • 최승국
    • 한국정보통신학회논문지
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    • 제14권4호
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    • pp.817-823
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    • 2010
  • MC-DS-CDMA 전송 방식에서는 서로 직교성이 있는 여러 개의 부반송파들을 사용함으로서 주파수 다이버시티 효과를 얻을 수 있어 우수한 성능의 전송이 가능하다. 본 논문에서는 파일럿 심볼을 이용하여 채널을 추정하는 MC-DS-CDMA 시스템에 MRRC 안테나 다이버시티 기법을 적용할 때의 시스템 성능을 분석한다. 이러한 다중 반송파 전송 방식에서는 채널 추정 에러, 비선형 전력 증폭기 및 송수신간 반송 주파수 편차 등에 의하여 시스템 성능이 열화 된다. 그러므로 위와 같은 영향들을 모두 고려하여 송신 신호가 다중경로 페이딩 채널을 통하여 전송될 때의 데이터 비트 오류율 성능을 분석한다.

Complex radial basis function network을 이용한 비선형 디지털 위성 통신 채널의 등화 (Equalizationof nonlinear digital satellite communicatio channels using a complex radial basis function network)

  • 신요안;윤병문;임영선
    • 한국통신학회논문지
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    • 제21권9호
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    • pp.2456-2469
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    • 1996
  • A digital satellite communication channel has a nonlinearity with memory due to saturation characeristis of the high poer amplifier in the satellite and transmitter/receiver linear filter used in the overall system. In this paper, we propose a complex radial basis function network(CRBFN) based adaptive equalizer for compensation of nonlinearities in digital satellite communication channels. The proposed CRBFN untilizes a complex-valued hybrid learning algorithm of k-means clustering and LMS(least mean sequare) algorithm that is an extension of Moody Darken's algorithm for real-valued data. We evaluate performance of CRBFN in terms of symbol error rates and mean squared errors nder various noise conditions for 4-PSK(phase shift keying) digital modulation schemes and compare with those of comples pth order inverse adaptive Volterra filter. The computer simulation results show that the proposed CRBFN ehibits good equalization, low computational complexity and fast learning capabilities.

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능동 클램프 회로를 이용한 Boost 입력형 ZVS 컨버터의 동특성 해석 (Dynamic Characteristics of Boost Input Type ZVS Converter using the Active Clamp Circuit)

  • 김성남;오용승;김희준
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제51권10호
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    • pp.595-600
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    • 2002
  • This paper presents the analyzed results of dynamic characteristics including steady state characteristics of the boost input type ZVS converter using the active clamp circuit by the state space averaging method. From the results, it can be seen that the converter has the 5th order transfer functions and the stable closed loop characteristic is obtained by using the compensated error amplifier with 2-pole and 1-zero. The validity of all analyzed results are verified by measurement.

전력케이블 진단을 위한 부분방전 검출장치의 설계 및 제작 (Design and Fabrication of a PD Detector for Power Cable Diagnosis)

  • 송재용;서황동;길경석;한문섭;장동욱
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2005년도 추계학술대회 논문집
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    • pp.777-782
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    • 2005
  • In this paper, we designed and fabricated a partial discharge (PD) detector to diagnose the soundness of CNCV cables by analyzing PD pulses and to predict discharge locations. The PD detector is consisted of a coupling network with a discharge free capacitor and a detection impedance, a voltage follower and a low noise amplifier. Lower cut-off frequency of the detector is adjusted at 175kHz to block AC voltage and to pass discharge pulse only. The discharge location could be obtained by the time of arrival method using travelling wave propagation theory. In a laboratory test on an eighty meter CV cable, we could position the discharge location within a two meter error.

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A 240 km Reach DWDM-PON of 8-Gb/s Capacity using an Optical Amplifier

  • Kim, Min-Hwan;Lee, Sang-Mook;Mun, Sil-Gu;Lee, Chang-Hee
    • Journal of the Optical Society of Korea
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    • 제11권3호
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    • pp.93-96
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    • 2007
  • We demonstrate a 240 km reach DWDM-PON at 8-Gb/s capacity based on wavelength-locked Fabry-Perot laser diodes and a bidirectional EDFA. We achieve a packet-error-free transmission in both the 64 upstream and 64 downstream channels, guaranteeing a 125 Mb/s symmetric data rate per user. There is no noticeable dispersion penalty. The power penalty due to the crosstalk induced by the DWDM transmission and detuning between AWGs is less than 1.2 dB, when the detuning is within ${\pm}0.12 nm$.

잡음 제거 회로를 이용한 LDO 레귤레이터 (Low Drop Out Regulator with Ripple Cancelation Circuit)

  • 김채원;권민주;정준모
    • 전기전자학회논문지
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    • 제21권3호
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    • pp.264-267
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    • 2017
  • 본 논문에서는 잡음 제거 회로를 이용하여 공급 전원 제거 비를 향상시킨 LDO(Low drop-out) 레귤레이터를 제안하였다. LDO 레귤레이터 내부의 오차증폭기와 패스 트랜지스터 사이에 잡음 제거 회로를 두어 전압 라인에서 들어오는 노이즈에 패스 트랜지스터가 받는 영향을 줄일 수 있게 설계하였으며, 기존의 LDO 레귤레이터와 동일한 레귤레이션 특성을 갖도록 했다. 제안한 회로는 0.18um 공정을 사용하였고 Cadence의 Virtuoso, Spectre 시뮬레이터를 사용하였다.

A Differential Current-to-Time Interval Converter Using Current-Tunable Schmitt Triggers

  • Chung, Won-Sup
    • 전기전자학회논문지
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    • 제21권4호
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    • pp.375-380
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    • 2017
  • A differential current-to-time interval converter is presented for current mode sensors. It consists of a ramp voltage generator, a current mode sensor, a reference current source, two current-tunable Schmitt triggers, a one-shot multivibrator, and two logic gates. The design principle is to apply a ramp voltage to each input of the two current-tunable Schmitt triggers whose threshold voltages are proportional to the drain current values of the current mode sensors. A proposed circuit converts a current change in the ISFET biosensor into its equivalent pulse width change. A prototype circuit built using TSMC 0.18 nm CMOS process exhibit a conversion sensitivity amounting to $726.9{\mu}s/pH$ over pH variation range of 2-12 and a linearity error less than ${\pm}0.05%$.

A Power-adjustable Fully-integrated CMOS Optical Receiver for Multi-rate Applications

  • Park, Kangyeob;Yoon, Eun-Jung;Oh, Won-Seok
    • Journal of the Optical Society of Korea
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    • 제20권5호
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    • pp.623-627
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    • 2016
  • A power-adjustable fully-integrated CMOS optical receiver with multi-rate clock-and-data recovery circuit is presented in standard 65-nm CMOS technology. With supply voltage scaling, key features of the optical receiver such as bandwidth, power efficiency, and optical sensitivity can be automatically optimized according to the bit rates. The prototype receiver has −23.7 dBm to −15.4 dBm of optical sensitivity for 10−9 bit error rate with constant conversion gain around all target bit rates from 1.62Gbps to 8.1 Gbps. Power efficiency is less than 9.3 pJ/bit over all operating ranges.

Bridge Resistance Deviation-to-Period Converter for Resistive Biosensors

  • Bae, Cheol-Soo
    • 한국정보전자통신기술학회논문지
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    • 제7권4호
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    • pp.195-199
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    • 2014
  • A bridge resistance deviation-to-period (BRD-to-P) converter is presented for interfacing resistive biosensors. It consists of a linear operational transconductance amplifier (OTA) and a current-controlled oscillator (CCO) formed by a current-tunable Schmitt trigger and an integrator. The free running period of the converter is 1.824 ms when the bridge offset resistance is $1k{\Omega}$. The conversion sensitivity of the converter amounts to $3.814ms/{\Omega}$ over the resistance deviation range of $0-1.2{\Omega}$. The linearity error of the conversion characteristic is less than ${\pm}0.004%$.