• Title/Summary/Keyword: Error amplifier

Search Result 311, Processing Time 0.022 seconds

Improving the PTS Method for the PAPR Reduction in the OFDM System (OFDM 시스템에서 PAPR 감소를 위한 PTS 기법의 성능개선)

  • Kim, Dong-Seek;Kwak, Min-Gil;Cho, Hyung-Rae
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.34 no.8
    • /
    • pp.1165-1171
    • /
    • 2010
  • The OFDM system has better characteristics in transmission rate, power efficiency, bandwidth efficiency, impulse-noise immunity, and narrow band interference immunity etc. in comparison with other conventional systems. However, high PAPR of an OFDM signals causes some serious non-linear processing of RF amplifier. And performance of the communication system gets worse. Therefore, various methods reducing PAPR of an OFDM skills such as the clipping method, block coding method, and phase rotation method etc. have been researched. In this paper, we propose a high-speed adaptive PTS method which eliminates high PAPR. And we compare the proposed method with other conventional methods. The proposed method has decreased quantity of calculation compare with an adaptive PTS method. Of course, The more its calculation amount is decreased, the more its BER characteristic is not better than an adaptive PTS method. However, keeping up satisfactory BER performance, we highly improved calculation amount of a PTS method.

Experimental Evaluation of Feedforward Control Based on the Dynamic Models of A Direct Drive SCARA Robot (직접구동 평면 다관절 로봇의 동역학적 모델에 따른 피드포워드 제어의 실험적 평가)

  • Hong, Yun-Sik;Kang, Bong-Su;Kim, Su-Hyeon;Park, Gi-Hwan;Kwak, Yun-Geun
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.20 no.1
    • /
    • pp.146-153
    • /
    • 1996
  • A SCARA type direct drive robot which can be used in the assembly operation was designed and manufactured. Graphite fiber epoxy composite material was used in the fabrication of the robot arm structure in order to improve the speed of the robot arm with a high damping effect. For model-based control and sensitivity analysis of system parameters, the dynamic model of robot arm and drive servo amplifier parameters such as equivalent gains of PWM driver and velocity gains of servo system were estimated from frequency response tests. The complete dynamic model for overall robot system was used in the simulation of the open-loop control. The simulation results agreed reasonably well to the experimental results. The feedforward control using the dynamic models improved the trajectory tracking performance, decreasing the tracking error by factor of three compared with PID control. This study found that the inverse dynamic model of the robot arm including the drive servo system showed better performances than the case of arm dynamic model only.

Design of a DC-DC Step-Down Converter for LED Backlight of Mobile Devices (휴대기기용 LED 백라이트를 위한 감압형 DC-DC 변환기 설계)

  • Son, Hyun-Sik;Lee, Min-Ji;Park, Won-Kyoung;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.15 no.3
    • /
    • pp.1700-1706
    • /
    • 2014
  • In this paper, a step down converter for LED backlight of mobile application has been proposed. The converter which is operated with 4 MHz high switching frequency is capable of reducing mounting area of passive devices consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. The control block consists of pulse width modulator, error amplifier and oscillator etc. Proposed step down converter has been designed and verified using a $0.35{\mu}m$ 1-poly 4-metal BCD process technology. Simulation results show that the output voltage is 1.8 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 KHz driven converter when the duty ratio is 0.4.

Feedback Control Loop Design of DC-DC Converter Systems Using Subcircuit (Subcircuit를 이용한 DC-DC 컨버터 시스템의 피드백 제어루프 설계)

  • Kwon, Soon-Kurl;Lee, Su-Ho
    • Journal of the Institute of Convergence Signal Processing
    • /
    • v.8 no.2
    • /
    • pp.113-118
    • /
    • 2007
  • In this paper, a novel approach to using Subcircuit of Pspice in designing feedback for DC-DC converter systems is proposed. Proposed new approach, the feedback design procedures which are based on small signal modeling are programmed as a subcircuit in Pspice. For this purpose, Analog Behavioral Modeling (ABM) is used. By using the subcircuit, the component values of the error compensation amplifier can be easily obtained by means of Pspice DC analysis. The methodology of development is presented in detail and application examples demonstrated the effectiveness of the proposed approach in designing feedbacks for DC-DC converters. The converter with PWM method used continuous current mode and calculated buck converter control signal with average and linear current technique. To decide pole and zero K-method was adapted and this kind of design procedure took stable function.

  • PDF

Design of the DC-DC Buck Converter for Mobile Application Using PWM/PFM Mode (PWM/PFM 모드를 이용한 모바일용 벅 변환기 설계)

  • Park, Li-Min;Jung, Hak-Jin;Yoo, Tai-Kyung;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.35 no.11B
    • /
    • pp.1667-1675
    • /
    • 2010
  • This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

Design of Digital Signal Processor for Ethernet Receiver Using TP Cable (TP 케이블을 이용하는 이더넷 수신기를 위한 디지털 신호 처리부 설계)

  • Hong, Ju-Hyung;SunWoo, Myung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.32 no.8A
    • /
    • pp.785-793
    • /
    • 2007
  • This paper presents the digital signal processing submodule of a 100Base-TX Ethernet receiver to support 100Mbps at TP cable channel. The proposed submodule consists of programmable gain controller, timing recovery, adaptive equalizer and baseline wander compensator. The measured Bit Error Rate is less than $10^{-12}BER$ when continuously receiving data up to 150m. The proposed signal processing submodule is implemented in digital circuits except for PLL and amplifier. The performance improvement of the proposed equalizer and BLW compensator is measured about 1dB compared with the existing architecture that removes BLW using errors of an adaptive equalizer. The architecture has been modeled using Verilog-HDL and synthesized using samsung $0.18{\mu}m$ cell library. The implemented digital signal processing submodule operates at 142.7 MHz and the total number of gates are about 128,528.

Study on Sensitivity of Burst-Mode Optical Receiver Depending on Photodiode Capacitance (포토다이오드의 정전용량에 따른 버스트모드 광 수신소자의 수신감도 연구)

  • Lee, Jung-Moon;Kim, Chang-Bong
    • Korean Journal of Optics and Photonics
    • /
    • v.19 no.5
    • /
    • pp.343-348
    • /
    • 2008
  • This study was carried out to commercialize FTTH by developing a burst mode optical receiver for E-PON. The optical receiver was manufactured by minimizing the capacitance of a photodiode to improve sensitivity for meeting 10, 20 km OLT Rx standard of E-PON at the transmission speed of 1.25 Gb/s. When bit-error ratio is $10^{-12}$ and PRBS is $2^5-1$, sensitivity is -26 dBm, loud/soft ratio is 23 dB. Both preamble time and guard time were set to 102.4 ns (128 bit). After comparing a photodiode whose capacitance is 0.53 pF with another photodiode whose capacitance has been minimized to 0.26 pF, we could see that sensitivity improved to 0.7 dBm and so did bandwidth to 190 MHz of burst mode for the optical receiver manufactured by the photodiode whose capacitance is 0.26 pF.

Implementation and Performance Analysis of Multi-GNSS Signal Collection System using Single USRP

  • Park, Kwi Woo;Choi, Yun Sub;Lee, Min Joon;Lee, Sang Jeong;Park, Chansik
    • Journal of Positioning, Navigation, and Timing
    • /
    • v.5 no.1
    • /
    • pp.11-20
    • /
    • 2016
  • In this paper, a system that can collect GPS L1 C/A, GLONASS G1, and BDS B1I signals with single front-end receiver was implemented using a universal software radio peripheral (USRP) and its performance was verified. To acquire the global navigation satellite system signals, hardware was configured using USRP, antenna, external low-noise amplifier, and external oscillator. In addition, a value of optimum local oscillator frequency was selected to sample signals from three systems with L1-band with a low sampling rate as much as possible. The comparison result of C/N0 between the signal collection system using the proposed method and commercial receiver using double front-end showed that the proposed system had 0.7 ~ 0.8dB higher than that of commercial receiver for GPS L1 C/A signals and 1 ~ 2 dB lower than that of commercial receiver for GLONASS G1 and BDS B1I. Through the above results, it was verified that signals collected using the three systems with a single USRP had no significant error with that of commercial receiver. In the future, it is expected that the proposed system will be combined with software-defined radio (SDR) and advanced to a receiver that has a re-configuration channel.

Low-voltage high-linear bipolar OTA and its application to IF bandpass Filter (저전압 고선형 바이폴라 OTA와 이를 이용한 IF 대역통과 필터)

  • Chung, Won-Sup;Son, Sang-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.7 s.361
    • /
    • pp.37-44
    • /
    • 2007
  • A low-voltage high-linear bipolar OTA and its application to IF bandpass filter for GSM cellular telephone are presented. The OTA consists of a low-voltage linear transconductor, a translinear current gain cell, and three current mirrors. The bandpass filter is composed of two cascaded identical second-order bandpass filters, which consist of a resistor, a capacitor, and a grounded simulated inductor realized with two OTA's and a grounded capacitor. SPICE simulations using an 8 GHz bipolar transistor-array parameter show that the OTA with a transconductance of 1 mS exhibits a linearity error of less than ${\pm}2%$ over an input voltage range of ${\pm}0.65\;V$ at supply voltages of ${\pm}2.0\;V$. Temperature coefficient of the transconductance is less than $-90ppm/^{\circ}C$. The bandpass filter has a center frequency of 85 MHz and Q-factor of 80. Temperature coefficient of the center frequency is less than $-182ppm/^{\circ}C$. The power dissipation of the filter is 128 mW.

Multiple-Symbol Differential Detection Scheme of Differentially Encoded MultiPhase Clipped MultiCode CDMA System (차동 부호화된 MultiPhase Clipped MultiCode CDMA 시스템의 수신 성능 개선을 위한 다중 심볼 차동 검출 방식 연구)

  • 이병하;안철용;김동구;조진웅
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.10A
    • /
    • pp.807-815
    • /
    • 2003
  • MultiCode-CDMA (MC-CDMA) system of chip level MPSK incorporating with clipper (MP-CDMA)[l] shows constant envelope signal which can mitigate the performance degradation due to nonlinear transmit amplifier. In this paper, modulation is modified to carry out differential encoded MPSK rather than MPSK. The modified system is called DMP-CDMA. DMP-CDMA using differential detection has advantages on receiver complexity and pilot overhead. However, it is inferior to coherent detection by about 4.0dB due to inherent power inefficiency of noncoherent detection and the error propagation. Multiple symbol differential detection is employed in order to improve DMP-CDMA using differential detection. As the result, the performance of DMP-CDMA system is improved about 3.6dB compared to differential detection.