• Title/Summary/Keyword: Error Correcting Codes

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New Error Control Algorithms for Residue Number System Codes

  • Xiao, Hanshen;Garg, Hari Krishna;Hu, Jianhao;Xiao, Guoqiang
    • ETRI Journal
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    • v.38 no.2
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    • pp.326-336
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    • 2016
  • We propose and describe new error control algorithms for redundant residue number systems (RRNSs) and residue number system product codes. These algorithms employ search techniques for obtaining error values from within a set of values (that contains all possible error values). For a given RRNS, the error control algorithms have a computational complexity of $t{\cdot}O(log_2\;n+log_2\;{\bar{m}})$ comparison operations, where t denotes the error correcting capability, n denotes the number of moduli, and ${\bar{m}}$ denotes the geometric average of moduli. These algorithms avoid most modular operations. We describe a refinement to the proposed algorithms that further avoids the modular operation required in their respective first steps, with an increase of ${\lceil}log_2\;n{\rceil}$ to their computational complexity. The new algorithms provide significant computational advantages over existing methods.

Design of Reed Solomon Encoder/Decoder for Compact Disks (컴팩트 디스크를 위한 Reed Solomon 부호기/복호기 설계)

  • 김창훈;박성모
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.281-284
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    • 2000
  • This paper describes design of a (32, 28) Reed Solomon decoder for optical compact disk with double error detecting and correcting capability. A variety of error correction codes(ECCs) have been used in magnetic recordings, and optical recordings. Among the various types of ECCs, Reed Solomon(RS) codes has emerged as one the most important ones. The most complex circuit in the RS decoder is the part for finding the error location numbers by solving error location polynomial, and the circuit has great influence on overall decoder complexity. We use RAM based architecture with Euclid's algorithm, Chien search algorithm and Forney algorithm. We have developed VHDL model and peformed logic synthesis using the SYNOPSYS CAD tool. The total umber of gate is about 11,000 gates.

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Concatenated Coding System for an Effective Error Correction (효율적인 에러 정정을 위한 콘케티네이티드 코팅 시스템)

  • Kang, Beob Joo;Kang, Chang Eon
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.3
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    • pp.309-316
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    • 1986
  • A concatenated coding system using a binary code as the inner code and a nonbinary code as the outer code has been constructed for the purpose of error correction. The complexity of a conventional coding system grows exponentially as the code length of a block code becomes longer. To reduce the complexity for ling code, an effective communication system has been proposed by cascading two codes-binary and norbinary codes. Using a parallel-to-serial circuit and a serial-to-parallel circuit, the concatenated coding system has been designed and constructed by empolying a (7,3) burst error correcting code as the inner code and a (7,3) Reed-Solomon code as the outer code. This system has been simulated and tested using a micro-computer. For the (49,9) concatenated coding system, the error probability of the channel has been evaluated and compared to different coding systems.

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DIRECTED STRONGLY REGULAR GRAPHS AND THEIR CODES

  • Alahmadi, Adel;Alkenani, Ahmad;Kim, Jon-Lark;Shi, Minjia;Sole, Patrick
    • Bulletin of the Korean Mathematical Society
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    • v.54 no.2
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    • pp.497-505
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    • 2017
  • The rank over a finite field of the adjacency matrix of a directed strongly regular graph is studied, with some applications to the construction of linear codes. Three techniques are used: code orthogonality, adjacency matrix determinant, and adjacency matrix spectrum.

New Irregular Quasi-Cyclic LDPC Codes Constructed from Perfect Difference Families (완전 차집합군으로부터 설계된 새로운 불규칙 준순환 저밀도 패리티 체크 부호)

  • Park, Hosung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.12
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    • pp.1745-1747
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    • 2016
  • In this paper, we propose a construction method of irregular quasi-cyclic low-density parity-check codes based on perfect difference families with various block sizes. The proposed codes have advantages in that they support various values with respect to code rate, length, and degree distribution. Also, this construction enables very short lengths which are usually difficult to be achieved by a random construction. We verify via simulations the error-correcting performance of the proposed codes.

UEP Effect Analysis of LDPC Codes for High-Quality Communication Systems (고품질 통신 시스템을 위한 LDPC 부호의 UEP 성능 분석)

  • Yu, Seog Kun;Joo, Eon Kyeong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.6
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    • pp.471-478
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    • 2013
  • Powerful error control and increase in the number of bits per symbol should be provided for future high-quality communication systems. Each message bit may have different importance in multimedia data. Hence, UEP(unequal error protection) may be more efficient than EEP(equal error protection) in such cases. And the LDPC(low-density parity-check) code shows near Shannon limit error correcting performance. Therefore, the effect of UEP with LDPC codes is analyzed for high-quality message data in this paper. The relationship among MSE(mean square error), BER(bit error rate) and the number of bits per symbol is analyzed theoretically. Then, total message bits in a symbol are classified into two groups according to importance to prove the relationship by simulation. And the UEP performance is obtained by simulation according to the number of message bits in each group with the constraint of a fixed total code rate and codeword length. As results, the effect of UEP with the LDPC codes is analyzed by MSE according to the number of bits per symbol, the ratio of the message bits, and protection level of the classified groups.

Quantum Error Correction Code Scheme used for Homomorphic Encryption like Quantum Computation (동형암호적 양자계산이 가능한 양자오류정정부호 기법)

  • Sohn, Il Kwon;Lee, Jonghyun;Lee, Wonhyuk;Seok, Woojin;Heo, Jun
    • Convergence Security Journal
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    • v.19 no.3
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    • pp.61-70
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    • 2019
  • Recently, developments on quantum computers and cloud computing have been actively conducted. Quantum computers have been known to show tremendous computing power and Cloud computing has high accessibility for information and low cost. For quantum computers, quantum error correcting codes are essential. Similarly, cloud computing requires homomorphic encryption to ensure security. These two techniques, which are used for different purposes, are based on similar assumptions. Then, there have been studies to construct quantum homomorphic encryption based on quantum error correction code. Therefore, in this paper, we propose a scheme which can process the homomorphic encryption like quantum computation by modifying the QECCs. Conventional quantum homomorphic encryption schemes based on quantum error correcting codes does not have error correction capability. However, using the proposed scheme, it is possible to process the homomorphic encryption like quantum computation and correct the errors during computation and storage of quantum information unlike the homogeneous encryption scheme with quantum error correction code.

Parallel LDPC Decoding on a Heterogeneous Platform using OpenCL

  • Hong, Jung-Hyun;Park, Joo-Yul;Chung, Ki-Seok
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.6
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    • pp.2648-2668
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    • 2016
  • Modern mobile devices are equipped with various accelerated processing units to handle computationally intensive applications; therefore, Open Computing Language (OpenCL) has been proposed to fully take advantage of the computational power in heterogeneous systems. This article introduces a parallel software decoder of Low Density Parity Check (LDPC) codes on an embedded heterogeneous platform using an OpenCL framework. The LDPC code is one of the most popular and strongest error correcting codes for mobile communication systems. Each step of LDPC decoding has different parallelization characteristics. In the proposed LDPC decoder, steps suitable for task-level parallelization are executed on the multi-core central processing unit (CPU), and steps suitable for data-level parallelization are processed by the graphics processing unit (GPU). To improve the performance of OpenCL kernels for LDPC decoding operations, explicit thread scheduling, vectorization, and effective data transfer techniques are applied. The proposed LDPC decoder achieves high performance and high power efficiency by using heterogeneous multi-core processors on a unified computing framework.

Design of A Cascaded Cyclic Product Coding system (Cascade 방식을 이용한 순환곱셈코드의 시스템 설계)

  • 김신령;강창언
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.5
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    • pp.24-28
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    • 1985
  • In this paper, the cyclic product codes which are capable of correcting random erros and burst errors simultaneously have been designed and constructed. First, the procedure for product of two cyclic codes is shown and thin the encoder and decoder system using the (7,4) cyclic Hamming code and the (3,1) cyclic code is implemented. The micro-computer is used for experiment and the system consists of encoder, decoder and interface circuits. The encoder of cyclic product code is implemented by interlacing encoders while the decoder is implemented by cascading decoders that interlace error trapping decoders. In conclusion, cyclic product codas are easily decodable and are capable of correcting four random errors and eight-burst errors. Better performance is obtained with low error rate.

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Prediction of Protein Subcellular Localization using Label Power-set Classification and Multi-class Probability Estimates (레이블 멱집합 분류와 다중클래스 확률추정을 사용한 단백질 세포내 위치 예측)

  • Chi, Sang-Mun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2562-2570
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    • 2014
  • One of the important hints for inferring the function of unknown proteins is the knowledge about protein subcellular localization. Recently, there are considerable researches on the prediction of subcellular localization of proteins which simultaneously exist at multiple subcellular localization. In this paper, label power-set classification is improved for the accurate prediction of multiple subcellular localization. The predicted multi-labels from the label power-set classifier are combined with their prediction probability to give the final result. To find the accurate probability estimates of multi-classes, this paper employs pair-wise comparison and error-correcting output codes frameworks. Prediction experiments on protein subcellular localization show significant performance improvement.