• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.413-415
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• 2008

The charge equalizer design for a series connected battery string is very challenging because it needs to satisfy many requirements such as implementation possibility, equalization speed, equalization efficiency, controller complexity, size and cost issues, voltage and current stress, and so on. Numerous algorithms and circuits were developed to meet the above demands and some interesting results have been obtained through them. However, for a large number of cells, for example, eighty or more batteries, the previous approaches might cause problems. Such problems include long equalization time, high controller complexity, bulky size, high implementation cost, and high voltage and current stress. To overcome these circumstances, this paper proposes a charge equalizer design method based on a battery modularization technique. In this method, the number of cells that we consider in an equalizer design procedure can be effectively reduces; thus, designing a charge equalizer becomes much easier. Furthermore, by applying the previously verified charge equalizers to the intramodule and the outer-module, we can obtain easy design of a charge equalizer and good charge balancing performance. Several examples and experimental results are presented to demonstrate the usefulness of the charge equalizer design method.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.155-167
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• 2015

An adaptive equalization scheme based on all-digital jitter measurement is proposed for a continuous time linear equalizer (CTLE) preceding a clock and data recovery (CDR) in a receiver circuit for high-speed serial interface. The optimum equalization coefficient of CTLE is determined during the initial training period based on the measured jitter. The proposed circuit finds automatically the optimum equalization coefficient for CTLE with 20", 30", 40" FR4 channel at the data rate of 5 Gbps. The chip area of the equalizer including the adaptive controller is 0.14 mm2 in a $0.13{\mu}m$ process. The equalizer consumes 12 mW at 1.2 V supply during the normal operation. The adaptive equalizer has been applied to a USB3.0 receiver.

• Journal of Korea Multimedia Society
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• v.21 no.9
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• pp.1110-1118
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• 2018

Personal sound amplifiers(PSAPs) provide accessible and affordable healthcare to individuals with hearing disability. Many studies are in progress for affordable PSAP development, but still people do not have a best fitting profile for the PSAP depending on their hearing test. As a result, they do not have a personalized and profiled music and sound, which are very helpful for those who has hearing problems. In this paper, we propose a device and mobile system to provide music with an equalizer value according to the hearing condition of an individual to prevent the hearing loss. In order to overcome the limit of frequency band of the equalizer in a smart phone, we developed bluetooth controlled equalizer based on the fitting profiles.

• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.174-175
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• 2019

Battery cells are connected in parallel to enlarge the system capacity. However, cell inconsistency may reduce the overall system capacity and cause the over-charging or over-discharging issue. This paper proposes a SOC-based sequencing equalizer for parallel-connected battery configuration that uses the ANFIS (adaptive neuro-fuzzy inference system) algorithm to make the switching decision. Depend on the load current and the SOC (state-of-charge) rate of cells, the switching decision is made to equalize the SOC of the battery cells. The simulation results show that the system capacity is maximized and the controller is adaptive for a large number of parallel-connected in dynamic load profile.

• Journal of the Korea Computer Industry Society
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• v.3 no.1
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• pp.27-34
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• 2002

There is much interest on information communications owing to the rapid development of network and IT(Information Technology). Analog signals are converted into digital signals for information communications. However, it is very difficult to completely erase the distortion induced during the conversion of analog signals such as voices and images into digital signals. Existing audio graphic equalizer requires very complex processes to calculate the gain and coefficients of the higher-order filter which is required to generate natural sound and to satisfy the need of each person. Unfortunately it is uneconomical and very difficult to embed the existing digital audio equalizer in the system because of the complexity of the existing digital audio equalizer for high quality sound. This paper discusses the design of a new digital audio graphic equalizer(DAGEQ) which can improve system performance and the quality of audio sound, and can be embedded in the system. This new DAGEQ is designed so that the gain can be controlled automatically. The automatic control of coefficients and gain empowers real time processing and the improvement of audio quality.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8A
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• pp.785-793
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• 2007

This paper presents the digital signal processing submodule of a 100Base-TX Ethernet receiver to support 100Mbps at TP cable channel. The proposed submodule consists of programmable gain controller, timing recovery, adaptive equalizer and baseline wander compensator. The measured Bit Error Rate is less than $10^{-12}BER$ when continuously receiving data up to 150m. The proposed signal processing submodule is implemented in digital circuits except for PLL and amplifier. The performance improvement of the proposed equalizer and BLW compensator is measured about 1dB compared with the existing architecture that removes BLW using errors of an adaptive equalizer. The architecture has been modeled using Verilog-HDL and synthesized using samsung $0.18{\mu}m$ cell library. The implemented digital signal processing submodule operates at 142.7 MHz and the total number of gates are about 128,528.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.1
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• pp.19-24
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• 2017

Nowadays, based on the advancement of IT techniques, innovative products combining IT techniques to PA system are developing. In this paper, we presented the hybrid mixer controller for digital PA system. We develop the integrated mixer controller which includes the digital mixer composing an existing digital PA system and function of digital integrated controller. Developed integrated mixer controller consists of multichannel mixer function with 16 audio input channels, 8 output channels. And, it has an equalizer for processing digital audio signal, matrix and limiter. Also, the developed controller has some features such as internet connection for controlling of overall PA system and remote monitoring of mixer process condition.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2589-2592
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• 2003

In this paper, a robust mixed H$_2$/H$\_$$\infty$/ output feedback control method is applied to the design of loop filter for PLL carrier phase tracking. The proposed method successfully copes with large S-curve slope uncertainty and a significant decision delay in the closed-loop that may exist In modern receivers due to a convolutional decoder or an equalizer. The objective is to design an output feedback controller which minimizes the H$_2$performance while satisfying the H$\_$$\infty$/ performance to guarantee the gain margin and phase margin for linear time invariant(LTI) polytopic uncertain systems. LMIs based approach is given to solve this problem. We can verify the H$\_$$\infty$/ performance satisfaction and minimize the phase detector error through the simulation result.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.4
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• pp.895-902
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• 2015

This paper presents a high-speed sensing and noise cancellation technique for large touch screens, which is called FDCS (Frequency Division Concurrent Sensing). Most conventional touch screen detection methods apply excitation pulses sequentially and analyze the sensing signals sequentially, and so are often unacceptably slow for large touch screens. The proposed technique applies sinusoidal signals of orthogonal frequencies simultaneously to all drive lines, and analyzes the signals from each sense line in frequency domain. Its parallel driving allows high speed detection even for a very large touch screens. It enhances the sensing SNR (Signal to Noise Ratio) by introducing a frequency domain noise filtering scheme. We also propose a pre-distortion equalizer, which compensates the drive signals using the inverse transfer function of touch screen panel to further enhance the sensing SNR. Experimental results with a 23" large touch screen show that the proposed technique enhances the frame scan rate by 273% and an SNR by 43dB compared with a conventional scheme.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.2
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• pp.187-193
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• 2004

For a power source of usual electronic devices such as PDA, smart phone, UPS and electric vehicle, the battery made of serially connected multiple cells is generally used. In this case, if there are some unbalanced among cell voltages, the total lifetime and the total capacity of the battery are limited to a lower value. To maintain a balanced condition in cells, an effective method of regulating the cell voltage in indispensable. In this paper, we propose the design of a balancing circuit for electronic appliances. The balancing system was controlled by a micro-controller which enables to implement the balancing action during charging period. Proposed method has been verified by the experiment using the charger and recorder. The experimental results show that the individual battery equalization can improve battery capacity and battery lifetime and performance through an extended operational time.