• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권6호
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• pp.312-315
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• 2004

The monolayer of oxygen atoms sandwiched between the adjacent nanocrystalline silicon layers was formed by ultra high vacuum-chemical vapor deposition (UHV-CVD). This multilayer Si-O structure forms a new type of superlattice, semiconductor-atomic superlattice (SAS). According to the experimental results, high-resolution cross-sectional transmission electron microscopy (HRTEM) shows epitaxial system. Also, the current-voltage (Ⅰ-Ⅴ) measurement results show the stable and good insulating behavior with high breakdown voltage. It is apparent that the system may form an epitaxially grown insulating layer as possible replacement of silicon-on-insulator (SOI), a scheme investigated as future generation of high efficient and high density CMOS on SOI.

• 한국항해학회지
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• 제15권3호
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• pp.99-106
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• 1991

In order to grow InGaAsP epitaxial layer on GaAs by LPE, an accurate phase diagram for In-Ga-As-P quarternary compounds is required. But the short wavelength InGaAsP/GaAs phase diagram for full wavelength range was not yet reported. In this study, therefore, a theoretical calculation has been carried out by using thermodynamic's equation for InGaAsP/GaAs in order to get the relation between the mole fraction of the sloute and solid phase compounds. And the calculation being compared with the dta of Kawanishi et. al, the result has been shown that his phase diagram obtained by the calculation can apply to growing InGaAsP/GaAs by LPE.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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• pp.457-461
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• 1996

An optimum design methodology for the power MOSFET's with a predetermined mask is proposed and verified by comparing with the results of MEDICI simulation and the data of commercially available devices. Optimization is completed by determining a doping concentration and a thickness of the epitaxial layer which satisfy a specific voltage and current rating requirements as well as a minimum on-resistance for the mask set. The commercial HEX-1 mask set with a die area of $40.4{\times}10^{-3}\;cm^2$ and a T0-220 package has the on-resistance of $1.5{\Omega}$ at 200 V/2.5 A rating while the M-1 mask from this study exhibits $0.6{\Omega}$ on-resistance at 200 V/6 A. The 60 % reduction in the on-resistance and 58 % enhancement in the current rating have been obtained by the proposed method.

• 한국표면공학회지
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• 제23권2호
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• pp.1-10
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• 1990

Metal-Organic Vapor Phase Epitaxy (MOVPE) is an epitaxial process utilizaing ane or more of organometallice as reactnte to grow compound semicond semiconductror layers. MOVPE is basically a cold wall process in which reactants are delivered without reacting with each other to the heated substrate where reactants are thermally decomposed to from compound semiconductors through chemical reaction. Since reactants are delivered as gas phase and the formation of the single crystal compunds depends on the thermal decomposition of the reactants, details of MOVPE relies on the hydrodynamics and pyroltsis and chemical reation of reactants inside on reaction chamber. It has been demonstrated that MOVPE is capable of growing virtually all of the III-V, II-VI and IV-VI compound semiconductrs, fabricating ultrathin epilayers, for ming abrupt hetrointerfaces with monolayer transition width, and is suitable for multi-wafer operation yilding a high throghtput. Overiew of reactror componts and layer, characteristics, and status of MOVPE are discussed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.365-368
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• 2004

Charge compensation effects in multi-resurf structure make possible to obtain high breakdown volatage and low on-resistance in vertical MOSFET. In this paper, electrical characteristics of the vertical MOSFET with multi epitaxial layer is presented. Proposed device has n and p-pillar for obtaining the charge compensation effects and The doping concentration each pillar is varied from $5{\times}10^{14}\;to\;1{\times}10^{16}/cm^3$. The thickness of the proposed device also varied from $400{\mu}m\;to\;500{\mu}m$. Due to the charge compensation effects, 4500V of breakdown voltage can be obtained.

• 한국자기학회:학술대회 개요집
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• 한국자기학회 2008년도 Asian Magnetics Conference
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• pp.85.2-85.2
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• 2008

• 한국진공학회지
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• 제18권2호
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• pp.127-132
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• 2009

Sb에 기초한 응력 초격자 적외선검출소자의 구성 물질인 도핑하지 않은 기판 GaSb 결정과 GaSb/SI-GaAs 박막에 잔존하고 있는 진성결함 (intrinsic defect)을 비교 조사하였다. 상온 근처 (250 K)까지 광여기 발광 (PL)을 보이는 GaSb 결정에서의 발광 에너지의 온도의존성으로부터, 밴드갭 에너지에 관한 경험식인 Varshni 함수의 파라미터 ($E_o$, $\alpha$, $\beta$)를 결정하였다. GaAs 기판 위에 성장된 이종 GaSb 박막에서는 GaSb 주요 진성결함으로 알려져 있는 29 meV의 이온화 에너지를 가지는 위치반전 (antisite) Ga ([$Ga_{Sb}$]) 결함과 함께 위치반전 Sb ([$Sb_{Ga}$])와의 복합결함 ([$Ga_{Sb}-Sb_{Ga}$])과 관련된 것으로 분석된 732/711 meV의 한 쌍의 깊은준위 (deep level)가 관측되었다. PL의 온도 및 여기출력 의존성을 분석하여, Sb-rich상태에서 성장된 GaSb 박막에서는 잉여 Sb의 자발확산 (self-diffusion)에 의하여 치환된 위치전도 [$Ga_{Sb}$] 및 [$Sb_{Ga}$]가 결합하여 [$Ga_{Sb}-Sb_{Ga}$]의 깊은준위를 형성하는 것으로 해석되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.327.1-327.1
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• 2014

Nitrides-on-silicon structures are considered to be an excellent candidate for unique design architectures and creating devices for high-power applications. Therefore, a lot of effort has been concentrating on growing high-quality III-nitrides on Si substrates, mostly Si(111) and Si(001) substrates. However, there are several fundamental problems in the growth of nitride compound semiconductors on silicon. First, the large difference in lattice constants and thermal expansion coefficients will lead to misfit dislocation and stress in the epitaxial films. Second, the growth of polar compounds on a non-polar substrate can lead to antiphase domains or other defective structures. Even though the lattice mismatches are reached to 16.9 % to GaN and 19 % to AlN and a number of dislocations are originated, Si(111) has been selected as the substrate for the epitaxial growth of nitrides because it is always favored due to its three-fold symmetry at the surface, which gives a good rotational matching for the six-fold symmetry of the wurtzite structure of nitrides. Also, Si(001) has been used for the growth of nitrides due to a possible integration of nitride devices with silicon technology despite a four-fold symmetry and a surface reconstruction. Moreover, Si(110), one of surface orientations used in the silicon technology, begins to attract attention as a substrate for the epitaxial growth of nitrides due to an interesting interface structure. In this system, the close lattice match along the [-1100]AlN/[001]Si direction promotes the faster growth along a particular crystal orientation. However, there are insufficient until now on the studies for the growth of nitride compound semiconductors on Si(110) substrate from a microstructural point of view. In this work, the microstructural properties of nitride thin layers grown on Si(110) have been characterized using various TEM techniques. The main purpose of this study was to understand the atomic structure and the strain behavior of III-nitrides grown on Si(110) substrate by molecular beam epitaxy (MBE). Insight gained at the microscopic level regarding how thin layer grows at the interface is essential for the growth of high quality thin films for various applications.

• 한국진공학회지
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• 제1권1호
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• pp.67-72
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• 1992

고에너지 반사 전자회절기(RHEED) 및 투과전자현미경(HRTEM)을 이용하여 Si(111)-7 $\times$ 7 면에서의 Ti 박막의 성장 mode와 Si(111) 면에서의 C54 TiSi2의 정합성장 을 조사하였다. 초고진공에서 Si(111)-7 $\times$ 7 표면에 상온에서 Ti를 증착하면 Ti/Si 계면에 서 비정질의 Ti-Si 중간막이 먼저 형성되고 그 위에 Ti 박막은 다결정으로 성장하였다. 160ML의 Ti를 증착한 시료를 초고진공 내에서 75$0^{\circ}C$로 10분 열처리하면 C54 TiSi2가 정합 성장하였으며 이는 HRTEM 격자상 및 TED Pattern으로 확인할 수 있었다. TiSi2/Si(111) 시 료를 다시 $900^{\circ}C$로 가열하면 TiSi2위에 단결정 Si층이 [111] 방향으로 성장하였다.

• 한국재료학회지
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• 제24권9호
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• pp.443-450
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• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.