• Korean Journal of Materials Research
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• v.11 no.7
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• pp.575-579
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• 2001

GaN buffer layer and epilayer have been grown on sapphire (0001) by metal organic chemical vapor deposition (MOCVD). GaN buffer layer ranging from 26 nm to 130 nm in thickness was grown at 55$0^{\circ}C$ prior to the 4 $\mu\textrm{m}$ thick GaN epitaxial deposition at 110$0^{\circ}C$. After GaN buffer layer growth, buffer layer surface was examined by atomic force microscopy (AFM). As the thickness of GaN buffer layer was increased, surface morphology of GaN epilayer was investigated by scanning electron microscopy (SEM). Double crystal X-ray diffraction (DCXRD) and Raman spectroscopy were employed to study crystallinity of GaN epilayers. Optical properties of GaN epilayers were measured by photoluminescence (PL). The epilayer grown with a thin buffer layer had rough surface, and the epilayer grown with a thick buffer layer had mirror-like surface of epilayer. Although the stress on the latter was larger than on the former, its crystallinity was much better. These results imply that the internal free energy is decreased in case of the thick buffer layer. Decrease in internal free energy promotes the lateral growth of the GaN film, which results in the smoother surface and better crystallinity.

• Journal of the Mineralogical Society of Korea
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• v.15 no.3
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• pp.221-230
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• 2002

Weathering of biotite shows a biotite-vermiculite-kaolinite sequence at the early stage, but presents biotite-kaolinite sequence without a significant intermediate phase (vermiculite) at the late stage from the weathering profile of the granitic gneiss. Secondary 1:1 phyllosilicates are kaolinite and halloysite which show different weathering textures originated by a different formation mechanism. Kaolinitization began from the edges of biotite and propagated toward the interior of grain along a multilayered front. $10 \AA$ layers of biotite are interleaving with $7\AA$ layers of kaolinite and c-axis of two phases is consistent. Kaolinite pseudomorph of biotite is isovolumetric, compared to the biotite boundary and includes many band-like porosities parallel to the cleavage. Platy kaolinite formed by 1:1 layer fur layer replacement of biotite. Halloysitization proceeded outward from the grain edges which were foliated as fine flakes and bent at the right angle for cleavage Halloysites were extensively fanning out and greatly increased the volume of grain. This indicated that halloysite tubes were formed by epitaxial overgrowth on the surface of biotite with import of Si and Al from the external solution by dissolution of plagioclase. These halloysites have abnormally high Fe content ( ~11%).

• Korean Journal of Materials Research
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• v.4 no.1
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• pp.9-23
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• 1994

Epitaxial $CoSi_2$ layer has been grown on NaCl(100) substrate at low deposition temperature($200^{\circ}C$) by multitarget bias cosputter deposition(MBCD). The phase sequence and crystallinity of deposited silicide as a function of deposition temperature and substrate bias voltage were studied by X-ray diffraction(XRD) and transmission electron microscopy(TEM) analysis. Crystalline Si was grown at $200^{\circ}C$ by metal induced crystallization(M1C) and self bias effect. In addition to, the MIC was analyzed both theoretically and experimentally. The observed phase sequence was $Co_2Si \to CoSi \to Cosi_2$ and was in good agreement with that predicted by effective heat of formation rule. The phase sequence, the CoSi(l11) preferred orientation, and the crystallinity had stronger dependence on the substrate bias voltage than the deposition temperature due to the collisional cascade mixing, the in-situ cleaning, and the increase in the number of nucleation sites by ion bombardment of growing surface. Grain growth induced by ion bombardment was observed with increasing substrate bias voltage at $200^{\circ}C$ and was interpreted with ion bombardment dissociation model. The parameters of $E_{Ar}\;and \alpha(V_s)$ were chosen to properly quantify the ion bombardment effect on the variation in crystallinty at $200^{\circ}C$ with increasing substrate bias voltage using Langmuir probe.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.565-568
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• 2003

2세대 초전도 선재로 알려져 있는 $YBa_2Cu_3O_{7-\delta}$ coated conductor는 금속모재/완충층/초전도층/보호층의 구조를 가진다. 2개 이상의 산화물 다층 박막으로 이루어진 완충층은 금속기판의 집합조직을 초전도층까지 전달하는 역할, 금속기판의 금속이 초전도층으로 확산되어 초전도층의 전기적 특성을 열화시키는 것을 막아주는 확산장벽으로의 역할 등을 수행한다. 1차 완충층은 금속기판의 집합조직을 유지하여야하며, 금속기판의 산화를 방지하면서 증착 되어야 한다. coated conductor 제조를 위한 첫 단계로 Pulsed Laser Deposition법을 이용하여 cube texture된 Ni 기판 위에 $Y_2O_3$ 박막을 증착 하였다. 최적의 증착 조건을 찾기 위해 증착 챔버의 산소 및 $H_2/Ar$ 혼합가스 분압과 기판온도를 변화시키면서 증착 하였다. $Y_2O_3$층의 (100) 집합조직은 기판온도 $600{\sim}700^{\circ}C$와 산소 분압 $0.01{\sim}0.1mTorr$에서 증착된 Y2O3 박막에서 금속기판과 유사한 집합조직을 얻을 수 있었다. 최적의 증착 조건에서 $Y_2O_3$ (222) ${\Phi}-scan$의 full width at half maximum (fwhm)이 $11^{\circ}$이고 (400) ${\omega}-scan$ fwhm은 $6^{\circ}$이었다.

• Journal of Sensor Science and Technology
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• v.23 no.3
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• pp.185-191
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• 2014

The width of depletion region in a varactor diode can be modulated by varying a reverse bias voltage. Thus, the preferred characteristics of depletion capacitance can obtained by the change in the width of depletion region so that it can select only the desirable frequencies. In this paper, the TV tuner varactor diode fabricated by hyper-abrupt profile control technique is presented. This diode can be operated within 3.3 V of driving voltage with capability of UHF band tuning. To form the hyperabrupt profile, firstly, p+ high concentration shallow junction with $0.2{\mu}m$ of junction depth and $1E+20ions/cm^3$ of surface concentration was formed using $BF_2$ implantation source. Simulation results optimized important factors such as epitaxial thickness and dose quality, diffusion time of n+ layer. To form steep hyper-abrupt profile, Formed n+ profile implanted the $PH_3$ source at Si(100) n-type epitaxial layer that has resistivity of $1.4{\Omega}cm$ and thickness of $2.4{\mu}m$ using p+ high concentration Shallow junction. Aluminum containing to 1% of Si was used as a electrode metal. Area of electrode was $30,200{\mu}m^2$. The C-V and Q-V electric characteristics were investigated by using impedance Analyzer (HP4291B). By controlling of concentration profile by n+ dosage at p+ high concentration shallow junction, the device with maximum $L_F$ at -1.5 V and 21.5~3.47 pF at 0.3~3.3 V was fabricated. We got the appropriate device in driving voltage 3.3 V having hyper-abrupt junction that profile order (m factor) is about -3/2. The deviation of capacitance by hyper-abrupt junction with C0.3 V of initial capacitance is due to the deviation of thermal process, ion implantation and diffusion. The deviation of initial capacitance at 0.3 V can be reduced by control of thermal process tolerance using RTP on wafer.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.62-62
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• 2015

In this study, we study the effects of CF4 plasma treatment on the characteristics of enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs). The CF4 plasma is generated by inductively coupled plasma reactive ion etching (ICP-RIE) system. The CF4 gas is decomposed into fluorine ions by ICP-RIE and then fluorine ions will effect the AlGaN/GaN interface to inhibit the electron transport of two dimension electron gas (2DEG) and increase channel resistance. The CF4 plasma method neither like the recessed type which have to utilize Cl2/BCl3 to etch semiconductor layer nor ion implantation needed high power to implant ions into semiconductor. Both of techniques will cause semiconductor damage. In the experiment, the CF4 treatment time are 0, 50, 100, 150, 200 and 250 seconds. It was found that the devices treated 100 seconds showed best electric performance. In order to prove fluorine ions existing and CF4 plasma treatment not etch epitaxial layer, the secondary ion mass spectrometer confirmed fluorine ions truly existing in the sample which treatment time 100 seconds. Moreover, transmission electron microscopy showed that the sample treated time 100 seconds did not have etch phenomena. Atomic layer deposition is used to grow Al2O3 with thickness 10, 20, 30 and 40 nm. In electrical measurement, the device that deposited 20-nm-thickness Al2O3 showed excellent current ability, the forward saturation current of 210 mA/mm, transconductance (gm) of 44.1 mS/mm and threshold voltage of 2.28 V, ION/IOFF reach to 108. As IV concerning the breakdown voltage measurement, all kinds of samples can reach to 1450 V.

• Korean Journal of Materials Research
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• v.13 no.5
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• pp.279-284
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• 2003

The $CoSi_2$ process is widely employed in a salicide as well as an ohmic layer process. In this experiment, we investigated the characteristics of $CoSi_2$ films by combinations of I-type (TiN 100$\AA$/Co 150$\AA$), II-type(TiN 100$\AA$/Co 150$\AA$/Ti 50$\AA$), III-type(Ti 100$\AA$/Co 150$\AA$/Ti 50$\AA$), and IV-type(Ti 100$\AA$/Co 150$\AA$/Ti 100$\AA$). Sheet resistances of $CoSi_2$ show the lowest resistance with 2.9 $\Omega$/sq. in a TiN/Co condition and much higher resistances in conditions simultaneously applying Ti capping layers and Ti interlayers. Though we couldn't observe a $CoSi_2$roughness dependence on the film stacks from RMS values, Ti capping layers turned into 78∼94$\AA$ thick TiN layers of (200) preferred orientation at $N_2$ambient. In addition, Ti interlayers helped to form the epitaxial $CoSi_2$with (200) preferred orientation and ternary compounds of Co-Ti-Si. We propose that film structures of II-type and III-type may be appropriate in the salicide process and the ohmic layer process from the viewpoint of Co diffusion kinetics and the CoSi$_2$epitaxy.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.12
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• pp.1080-1086
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• 2005

We have studied the Ge redistribution after dry oxidation and the oxide growth rate of $Si_{1-x}Ge_x$ epitaxial layer. Oxidation were performed at 700, 800, 900, and $1,000\;^{\circ}C$. After the oxidation, the results of RBS (Rutherford Back Scattering) & AES(Auger Electron Spectroscopy) showed that Ge was completely rejected out of the oxide and pile up at $Si_{1-x}Ge_x$ interface. It is shown that the presence of Ge at the $Si_{1-x}Ge_x$ interface changes the dry oxidation rate. The dry oxidation rate was equal to that of pure Si regardless of Ge mole fraction at 700 and 800$^{\circ}C$, while it was decreased at both 900 and $1,000^{\circ}C$ as the Ge mole fraction was increased. The dry of idation rates were reduced for heavy Ge concentration, and large oxiidation time. In the parabolic growth region of $Si_{1-x}Ge_x$ oxidation, the parabolic rate constant are decreased due to the presence of Ge-rich layer. After the longer oxidation at the $1,000^{\circ}C$, AES showed that Ge peak distribution at the $Si_{1-x}Ge_x$ interface reduced by interdiffusion of silicon and germanium.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.94-94
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• 2008

We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

• Progress in Superconductivity
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• v.11 no.2
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• pp.123-127
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• 2010

The properties of buffer layer for thermal and chemical stability in coated conductor is a very important issue. $CeO_2$ has desirable thermal and chemical stability as well as good lattice match. In this study, $CeO_2$ was deposited by electron beam deposition. The MgO(001) single crystal and LMO buffered IBAD substrate(LMO/IBAD-MgO/$Y_2O_3/Al_2O_3$/Hastelloy) were used as substrates, which have $\Delta\phi$ values of ${\sim}8.9^{\circ}$. The epitaxial $CeO_2$ films was deposited with high deposition rate of $12{\sim}16\;{\AA}/sec$. During deposition, the change of oxygen partial pressure(${\rho}O_2$) does not cause change in c-axis texture. In case of $CeO_2$ on MgO single crystal, the substrate temperature was optimized at $750^{\circ}C$ with superior $\Delta\phi$ and $\Delta\omega$ value. Otherwise, In case of LMO buffered IBAD substrate, It was optimized at $650^{\circ}C$ with increasing its deposition thickness of $CeO_2$, which was finally obtained with best $\Delta\phi$ value of $5.5^{\circ}$, $\Delta\omega$ value of $2^{\circ}$ and Ra value of 2.2 nm.