• Title/Summary/Keyword: Energy Recovery Circuit

Search Result 153, Processing Time 0.024 seconds

A Study on High Efficient Energy Recovery Circuit for AC Plasma Display Panel Drive (AC Plasma Display Panel구동 장치의 고효율 전력 회수 회로에 관한 연구)

  • Yoon Won-Sik;Kang Feel-Soon;Park Han-Woog;Kim Cheul-U
    • Proceedings of the KIPE Conference
    • /
    • 2001.07a
    • /
    • pp.442-445
    • /
    • 2001
  • The sustaining driver for color ac plasma display panel should provide alternating high voltage pulses and recover the energy discharged from the intrinsic capacitance between the scanning and sustaining electrodes inside the panel. In this paper, a novel efficient energy recovery circuit employing boost-up function is proposed to achieve a faster rise-time and in order to obtain a stable sustain voltage. The principle of operation, features, and simulated results are illustrated and verified on an equivalent capacitance, which is equals In that of 40-inch-panel, 200 (kHz).

  • PDF

A High Speed Address Recovery Technique for Single-Scan Plasma Display Panel(PDP) (Single-Scan Plasma Display Panel(PDP)를 위한 고속 어드레스 에너지 회수 기법)

  • Lee, Jun-Young
    • Proceedings of the KIEE Conference
    • /
    • 2005.05a
    • /
    • pp.239-242
    • /
    • 2005
  • A high speed address recovery technique for AC plasma display Panel(PDP) is proposed. By removing the GND switching operation, the recovery speed can be increased and switching loss due to GND switch also becomes to be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Thus, the technique shows the minimum address power consumption according to various displayed images, different from Prior methods operating in fixed mode regardless of images. Test results with 50" HD single-scan PDP(resolution = 1366$\times$768) show that less than 350ns of recovery time is successfully accomplished and about 54% of the maximum power consumption can be reduced, tracing minimum power consumption curves.

  • PDF

A High Speed Address Recovery Technique for Single-Scan Plasma Display Panel(PDP) (Single-Scan Plasma Display Panel(PDP)를 위한 고속 어드레스 에너지 회수 기법)

  • Lee Jun-Young
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.54 no.9
    • /
    • pp.450-453
    • /
    • 2005
  • A high speed address recovery technique for AC plasma display panel(PDP) is proposed. Replacing GND switch by clamping diode. the recovery speed can be increased by saving GND hold-time and switching loss due to GND switch also becomes also be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Test results with 50' HD single-scan PDP(resolution = 1366$\times$768) show that less than 3sons of recovery time is successfully accomplished and about$54\%$ of the maximum power consumption can be reduced, tracing minimum power consumption curves.

A Novel Current-fed Energy Recovery Sustaining Driver for Plasma Display Panel(PDP)

  • Han, Sang-Kyoo;Moon, Gun-Woo;Youn, Myung-Joong
    • Journal of Power Electronics
    • /
    • v.4 no.1
    • /
    • pp.39-45
    • /
    • 2004
  • A novel current-fed energy-recovery sustaining driver (CFERSD) for a PDP is proposed in this paper. Its main idea is to recover the energy stored in the PDP or to inject the input source energy to the PDP by using the current source built-up in the energy recovery inductor. This method provides zero-voltage-switching (ZVS) of all main power switches, the reduction of EMI, and more improved operational voltage margins with the aid of the discharge current compensation. In addition, since the current flowing through the energy recovery inductor can compensate the plasma discharge current flowing through the conducting power switches, the current stress through all main power switches can be considerably reduced. Furthermore, it features a low conduction loss and fast transient time. Operations, features and design considerations are presented and verified experimentally on a 1020${\times}$l06mm sized PDP, 50kHz-switching frequency, and sustaining voltage 140V based prototype.

Load-Adaptive Address Energy Recovery Technique for Plasma Display Panel

  • Lee Jun-Yeong
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
    • /
    • 2005.05a
    • /
    • pp.192-200
    • /
    • 2005
  • A high speed address recovery technique for AC plasma display panel(PDP) is proposed. By removing the GND switching operation, the recovery speed can be increased and switching loss due to GND switch also becomes to be reduced. The proposed method is able to perform load-adaptive operation by controlling the voltage level of energy recovery capacitor, which prevents increasing inefficient power consumption caused by circuit loss during recovery operation. Thus, th e technique shows the minimum address power consumption according to various displayed images, different from prior methods operating in fixed mode regardless of images. Test results with 50' HD single- scan PDP(resolution : $1366{\times}768$) show that less than 350ns of recovery time is successfully accomplished and about $54\%$ of the maximum power consumption can be reduced, tracing minimum power consumption curves.

  • PDF

A Highly Efficient AC-PDP Driver Featuring an Energy Recovery Function in Sustaining Mode Operation

  • Kang, Feel-Soon;Park, Sung-Jun;Kim, Cheul-U
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
    • /
    • v.2B no.3
    • /
    • pp.100-108
    • /
    • 2002
  • A simple sustain driver employing an energy recovery function is proposed as a highly efficient driver of a plasma display panel. The proposed driver uses dual resonance in the sustaining mode operation: a main resonance between an inductor and an external capacitor to produce alternative pulses and a sub-resonance between an inductor and a panel to recover the energy consumption by the capacitive displacement current of the PDP. The operational principle and design procedure of the proposed circuit are presented with theoretical analysis. The operation of the proposed sustain driver is verified through simulation and experiments based on a 7.5-inch-diagonal panel with a 200 KHz operating frequency.

Parameter Design and Power Flow Control of Energy Recovery Power Accumulator Battery Pack Testing System

  • Bo, Long;Chong, Kil To
    • Journal of Electrical Engineering and Technology
    • /
    • v.8 no.4
    • /
    • pp.787-798
    • /
    • 2013
  • This paper proposes a special power circuit topology and its corresponding control strategy for an energy recovery power accumulator battery pack testing system (PABPTS), which is particularly used in electric vehicles. Firstly, operation principle and related parameter design for the system are illustrated. Secondly, control strategy of the composite power converter for PABPTS is analyzed in detail. The improved scheme includes a high accuracy charge and discharge current closed loop. active power reference for the grid-side inverter is provided by the result of multiplication between battery pack terminal voltage and test current. Simulation and experimental results demonstrate that the proposed scheme could not only satisfy the requirements for PABPTS with wide-range current test, but also could recover the discharging energy to the power grid with high efficiency.

A Novel Multi-Level Type Sustaining Driver for AC Plasma Display Panel (새로운 방식의 멀티레벨 AC PDP 구동장치)

  • Jung Woo-Chang;Kang Kyung-Woo;Yoo Jong-Gul;Ko Jong-Sun;Hong Soon-Chan
    • Proceedings of the KIPE Conference
    • /
    • 2004.07a
    • /
    • pp.425-429
    • /
    • 2004
  • A new multi-level type energy recovery sustaining driver for AC PDP(Plasma Display Panel) is proposed in this paper. The multi-level driver has been developed to reduce the voltage stress on switching elements. Comparing the proposed driver with the conventional multi-level driver, 4 switching elements, 4 diodes, and two auxiliary capacitors are eliminated in the viewpoint of circuit structure. Moreover, the voltage stress on switching elements is more reduced and the sustain period is extended. To verify the validity of the proposed energy recovery circuit, computer simulations using PSpice program are carried out.

  • PDF

Electromagnetic Retarder's Power Recovery Device and Voltage Control (전자기형 리타더의 전력회수장치 및 전압제어)

  • Jung, Sung-Chul;Yoon, In-Sik;Ko, Jong-Sun
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.21 no.5
    • /
    • pp.396-403
    • /
    • 2016
  • Usually, large-sized buses and trucks have a very high load. In addition, frequent braking during downhill or long-distance driving, causes the conventional method using the brake friction to have a problem in safety because of brake fade and brake burst phenomenon. Auxiliary brakes dividing the braking load is essential. Hence, environment-friendly auxiliary brakes, such as contactless brake rather than the engine auxiliary brake system are needed. A study aimed at improving the energy efficiency by recharging electric energy with changing mechanical to electrical energy that occurs when braking is actively in progress. In this paper, the voltage control method is utilized to recover the electric energy generated in the electromagnetic retarder instead of the eddy current. To regenerate the braking energy into the electrical energy, the resonant L-C circuit is configured in the retarder. The voltage generated in the retarder is simply modeled as a transformer. However, retarder voltage control in this paper is simulated by modeling the induction generator because this induction generator modeling is more practical than transformer modeling. The changes in the voltage of the resonance circuit, which depends on the switch pulse duration of the control device, were analyzed. A PI controller algorithm to control this voltage is proposed. The feasibility of modeling retarder and voltage controller are shown by using MATLAB Simulink in this paper.

Study on the Performance Verification Method and Failure Mechanism of Grading Capacitor of a Two-break Circuit-breaker (2점절 차단기 균압용 콘덴서 절연파괴 고장 메커니즘 및 성능검증 방법에 관한 연구)

  • Oh, SeungRyle;Han, Kisun;Kim, TaeKyun
    • KEPCO Journal on Electric Power and Energy
    • /
    • v.5 no.1
    • /
    • pp.11-15
    • /
    • 2019
  • Recently, the circuit-breaker rated voltage is getting higher as the transmission voltage increases. To increase the circuit-breaker rated voltage, a multi-break circuit-breaker which has two or more breakers in series is adopted. For multi-break circuit-breaker, a grading capacitor is used to mitigate the Transient Recovery Voltage(TRV) and control the voltage distribution across the individual interrupter units. However, all over the world, there are many failures such as mechanical damage, explosion due to insulation breakdown. Therefore, it is necessary to study the causes of failure and the new performance verification method. In this paper, we investigate the causes of dielectric breakdown of the grading capacitors in the KEPCO power system and propose the performance verification method.