• Title/Summary/Keyword: Encryption Module

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Design and Implementation of a System Call Interface for Supporting File Partial Encryption (파일 부분 암호화 지원을 위한 시스템 호출의 설계 및 구현에 관한 연구)

  • Seo, Hye-In;Kim, Eun-Gi
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.3
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    • pp.557-567
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    • 2018
  • There are currently various file encryption solutions for encrypting and storing files on disk. However, the existing file encryption solutions handle encryption and decryption all at once by file or directory. In this paper, we propose a system call supporting partial encryption function of the file. The user sets the encryption information with the system call interface at a portion where encryption of the file data is desired. And then the user writes file data, the data is encrypted and stored. Also if the user sets decryption information and reads the file data, the necessary part is decrypted by applying the set information. For the proposed system call, It consists of inspection module, management module, encryption module, decryption module, and HMAC module as per required system call. And it was implemented on the Linux environment. Also the operation of implemented system call was verified on the development board, and the performance was analyzed by measuring performance speed.

A Study of Practical Field Application Cryptographic Module through Evaluation Derived by Connection Indicators (품질 연계지표 평가방법을 사용한 암호화 모듈 실무현장 적용체계 연구)

  • Noh, SiChoon;Na, SangYeob
    • Convergence Security Journal
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    • v.14 no.4
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    • pp.55-60
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    • 2014
  • In this study, we propose a cryptographic module quality evaluation system referenced by ISO/IEC 9000 quality system with Quality, Quality Factor, Quality Subfactor, Metric. Practical application process encryption algorithm based on the encryption algorithm to encrypt the pros and cons valuation of diagnosis, point selection algorithm, analysis, and quality items(quality factor), eliciting constraints derived, such as the cryptographic module design quality evaluation system is set to step 5. The five steps are examples of field-based diagnostic tool for cryptographic operations, the most essential work to be done in order to derive one will work. 2-Factor encryption module for connection between indicator items(quality factor) to identify and ensure the quality of the item the constraints of the environment are two kinds of cryptographic operations. This study is an encryption module and a practical field application system, it presents the standardized model. We have to meet the rapid changes in information technology. The environment, development and the encryption algorithm applied to model a wide variety of on-site development encryption will be able to expect the efficiency.

Systems Engineering Approach to develop the FPGA based Cyber Security Equipment for Nuclear Power Plant

  • Kim, Jun Sung;Jung, Jae Cheon
    • Journal of the Korean Society of Systems Engineering
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    • v.14 no.2
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    • pp.73-82
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    • 2018
  • In this work, a hardware based cryptographic module for the cyber security of nuclear power plant is developed using a system engineering approach. Nuclear power plants are isolated from the Internet, but as shown in the case of Iran, Man-in-the-middle attacks (MITM) could be a threat to the safety of the nuclear facilities. This FPGA-based module does not have an operating system and it provides protection as a firewall and mitigates the cyber threats. The encryption equipment consists of an encryption module, a decryption module, and interfaces for communication between modules and systems. The Advanced Encryption Standard (AES)-128, which is formally approved as top level by U.S. National Security Agency for cryptographic algorithms, is adopted. The development of the cyber security module is implemented in two main phases: reverse engineering and re-engineering. In the reverse engineering phase, the cyber security plan and system requirements are analyzed, and the AES algorithm is decomposed into functional units. In the re-engineering phase, we model the logical architecture using Vitech CORE9 software and simulate it with the Enhanced Functional Flow Block Diagram (EFFBD), which confirms the performance improvements of the hardware-based cryptographic module as compared to software based cryptography. Following this, the Hardware description language (HDL) code is developed and tested to verify the integrity of the code. Then, the developed code is implemented on the FPGA and connected to the personal computer through Recommended Standard (RS)-232 communication to perform validation of the developed component. For the future work, the developed FPGA based encryption equipment will be verified and validated in its expected operating environment by connecting it to the Advanced power reactor (APR)-1400 simulator.

Design and Implementation of Web Service System for secure Message Transmission in Electronic Commerce (전자상거래 환경에서의 안전한 메시지 전송을 위한 웹 서비스 시스템 설계 및 구현)

  • Park, Jong-Hoon;Kim, Chul-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.8
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    • pp.1855-1860
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    • 2010
  • This paper describes construction of web services system for secure message transmission appling web services standards. This system composes single sign on module, SSL module and secure message module. We applied these modules to price comparison site. Single sign on module used SAML standards. This module was designed, in order to provide authentication and authorization. As SSL module processes message encryption among end to end, messages of this system are secure. Secure message module is designed according to WS-Security standards and processes authentication, XML signature and XML encryption.

Study on New Security Device of Telephony Using the Pseudo Random Number Generator (의사난수발생기를 이용한 새로운 유선전화 도청방지장치에 관한 연구)

  • Kim, Soon-Seok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.655-657
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    • 2008
  • We suggest the digital voice encryption module using the pseudo random number generator and design the sorority device of a telephone using the module. The proposed method provides encryption method of the telephone against the third party. This encryption method uses pseudo random number generator which computes the encryption key using the shared secret key and the current time value.

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Study on New Security Device of Telephony Using the Pseudo Random Number Generator (의사난수발생기를 이용한 새로운 유선전화 도청방지장치에 관한 연구)

  • Kim, Soon-Seok;Lee, Yong-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.6
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    • pp.1006-1009
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    • 2008
  • We suggest the digital voice encryption module using the pseudo random number generator and design the security device of a telephone using the module. The proposed method provides encryption method of the telephone against the third party. This encryption method uses pseudo random number generator which computes the encryption key using the shared secret key and the current time value.

The cryptographic module design requirements of Flight Termination System for secure cryptogram delivery (안전한 보안명령 전달을 위한 비행종단시스템용 암호화 장치 설계 요구사항)

  • Hwang, Soosul;Kim, Myunghwan;Jung, Haeseung;Oh, Changyul;Ma, Keunsu
    • Journal of Satellite, Information and Communications
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    • v.10 no.3
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    • pp.114-120
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    • 2015
  • In this paper, we show the design requirements of the cryptographic module and its security algorithm designed to prevent the exposure of the command signal applied to Flight Termination System. The cryptographic module consists of two separate devices that are Command Insertion Device and Command Generation Device. The cryptographic module designed to meet the 3 principles(Confidentiality, Integrity and Availability) for the information security. AES-256 block encryption algorithm and SHA-256 Hash function were applied to the encrypted symmetric key encryption method. The proposed cryptographic module is expected to contribute to the security and reliability of the Flight Termination System for Space Launch Vehicle.

Security System using Protocol-Based Security Module for Secure Data Transmission in Web Environment (웹 환경에서 안전한 데이타 전송을 보장하는 프로토콜 기반의 보안 모듈에 근거한 보안 시스템)

  • 장승주;임동훈
    • Journal of KIISE:Information Networking
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    • v.29 no.6
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    • pp.635-644
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    • 2002
  • We propose the PBSM(Protocol-Based Security Module) system which guarantees the secure data transmission under web environments. There are two modules in the PBSM architecture. One is Web Server Security Module(WSSM) which is working on a web server, the other is the Winsock Client Security Module(WSCSM) which is working on a client. The WSCSM security module decrypts the encrypted HTML document that is received from the security web server. The decrypted HTML document is displayed on the screen of a client. The WSSM module contains the encryption function for HTML file and the decryption function for CGI(Common Gateway Interface). The formal analysis methodology is imported from format theory for analyzing the data flow of the PBSM system. The formal analysis methodology is based on the order theory.

The Development of Web Browsed Electronic Document Interchanges System (초고속정보통신망상에서 웹 기반의 전자문서교환(EDI) 시스템 구현)

  • Kim, Nak-Hyun;Roh, Myung-Ho
    • IE interfaces
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    • v.13 no.2
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    • pp.258-265
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    • 2000
  • EDI(Electronic Data Interchange) allows the exchange of business information and computer-processable data in a standard, structured format electronically between organizational entities. EDI handles the restructuring of a business document into the standard format so that it can be transmitted from one computer to another. This paper identifies features and technologies of web browsed electronic document exchange system as follows 1) the fundamental technologies that consists of the EDI technologies, the Internet/Web technologies, the security/authentication techniques, and the XML implementation technologies. 2) the functions that consists of the document standards, transfer technology of the document, encryption and authentication 3) the implemented Web-EDI systems that consists of document generation module, encryption and authentication module, transfer module, acknowledgement module, administration module. In this paper, the Web-based EDI system implemented from the researched technologies will be installed on the EDI servers owned by corporate customers and enable the exchange of documents between each installed companies.

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Efficient FPGA Implementation of AES-CCM for IEEE 1609.2 Vehicle Communications Security

  • Jeong, Chanbok;Kim, Youngmin
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.2
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    • pp.133-139
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    • 2017
  • Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.