• Proceedings of the Korean Information Science Society Conference
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• 2012.06b
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• pp.83-85
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• 2012

국방 분야의 무기체계 내장형 소프트웨어(embedded software)는 그 규모와 복잡도가 증가함에 따라 소프트웨어 품질이 매우 중요하게 인식되고 있으며, 고객 또한 소프트웨어 품질 및 신뢰성 시험 활동에 대해 높은 요구사항을 제시하고 있다. 최근 "무기체계 내장형 소프트웨어 획득 및 관리 실무 지침서(방위사업청 지침, 2011.11.30)"가 명문화되었으며, 이 지침서 내에도 소프트웨어 신뢰성 시험을 강조하고 있다. 그러나 업계에서는 소프트웨어 신뢰성 시험에 대한 개발 단계의 테스트 설계 활동이 체계적으로 수행되지 않고 있으며, 테스트 설계 활동에서 테스트 설계 기법을 제대로 활용하고 있지 못하고 있다. 이를 위해 본 논문에서는 테스트 설계 활동과 테스트 설계 기법을 소개한다. TMMi 및 ISTQB 지식체계에서 제시하고 있는 테스트 설계 기법을 기반으로 실제 무기체계 내장형 소프트웨어의 테스트 시 적용하였던 테스트 설계 기법을 소개하고, 테스트케이스를 효과적으로 도출할 수 있는 방법을 제안한다.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.781-782
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• 2006

This treatise proposed environment for Embedded system's development. Virtual platform can help to solve problem that hardware designer can experience at design process of hardware. Compose circuit of most suitable that is verified before mix parts by various kinds method and compose circuit by board level because can do simulation with software and software that is optimized to hardware and offer flexibility that can test. Therefore, can shorten expense that is cost in development and time. Embody development platform for 8051 systems for verification of development platform, and compose and verified system in various kinds structure.

• Journal of information and communication convergence engineering
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• v.11 no.2
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• pp.112-117
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• 2013

In order to reuse a register transfer level (RTL)-based IP block, it takes another architectural exploration in which the RTL will be put, and it also takes virtual platforms to develop the driver and applications software. Due to the increasing demands of new technology, the hardware and software complexity of organizing embedded systems is growing rapidly. Accordingly, the traditional design methodology cannot stand up forever to designing complex devices. In this paper, I introduce an electronic system level (ESL)-based approach to designing complex hardware with a derivative of SystemVerilog. I adopted the concept of reuse with higher levels of abstraction of the ESL language than traditional HDLs to design multiplication server farms. Using the concept of ESL, I successfully implemented server farms as well as a test bench in one simulation environment. It would have cost a number of Verilog/C simulations if I had followed the traditional way, which would have required much more time and effort.

• Journal of the Korea Society of Computer and Information
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• v.18 no.8
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• pp.105-111
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• 2013

This paper presents a virtual sensor system that is an effective method to test application software of smart sensors. The common way of testing sensor application is to build a test board, connect sensors to the board, and test sensor applications on the board with sensor's measurements as inputs. The problem of testing sensor application software with sensor's measurements as inputs is the restriction of test data. In other words, software testers cannot manipulate test data, because test data is generated by sensors. To solve this problem a virtual sensor system is presented in this paper. The virtual sensor system enables software testers to manipulate measurements of sensors. In the virtual sensor system, generation of virtual sensors comprises three stages - sensor selection, sensor characterization, and determination of output patterns. Sensor's measurements that can be manipulated through the virtual sensor system make the process of testing efficient. To show the usefulness of our virtual sensor system, it is applied to sensor applications in Android platform and the result of experiments is shown.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.1137-1140
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• 1999

In this thesis, we research about Communication System Construction and Test-Bed Realization Method and Software’s Design with written program into Embedded Micro Controller’s restricted memory region using a DSP Chip to deal with mainly high speed communication. Tools used for modern communication network control use TI or AMD general chip class, but nevertheless responsibility for the point at issue, Analog Device is architecture design model moderated for small communication system. In this thesis, we present extended model, and realize basic case.

• Journal of Advanced Navigation Technology
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• v.27 no.2
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• pp.228-234
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• 2023

As the increasing demand for high-quality software, there is huge requiring for quality certification of international standards, industrial functional safety (IEC 61508), automotive (ISO 26262), embedded software guidelines for weapon systems, etc., in the industry. Software companies are very difficult to systematically acquire the quality certification in terms of cost and manpower of Startup, venture small-sized companies. For their companies one test case automatic generation is considered as a core technique to evaluate or improve software quality. This paper proposes a test case automatic generation method based on the design decision table for system and software design verification. We apply the proposed method with OMG's standard techniques of metamodel and model transformation for automatically generating test cases. To do this, we design the metamodels of design decision table (Model) and test case document (Text) and define model transformation to automatically generate test cases, which will expect to easily work MC/DC coverage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.317-319
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• 2003

HILS(Hardware In-the Loop Simulation) is commonly used in the development and testing of embedded systems, when those systems cannot be tested easily, thoroughly, and repeated in their operational environments. HILS can be a useful tool to develop products more quickly and cost effectively and also reduces the possibility of serious defects being discovered after production. During the product development period, Design optimization and hardware/software debugging can be performed using HILS skill. This paper describes a HILS model for the STG(Steam-Turbine Generator) Simulator to prove the performance of the developed Digital Governor. It is developed using software technics which can confirm the responses of a real-time system.

• KIPS Transactions on Software and Data Engineering
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• v.6 no.8
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• pp.401-410
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• 2017

This paper proposes a method to generate test cases in an automatic manner, based on checklist containing test cases used for testing embedded systems. In general, the items to be tested are defined in a checklist. However, most test case generation strategies recommend to test a system with not only the defined test items but also various mutated test conditions. The proposed method parses checklist in Korean file and figures out the system inputs and outputs, and operation information. With the found information and the user defined test case generation strategy, the test cases are automatically generated. With the proposed method, the errors introduced during manual test case generation may be reduced and various test cases not defined in checklist can be generated. The proposed method is implemented and the experiment is performed with the checklist for an medical embedded system. The feasibility of the proposed method is shown through the test cases generated from the checklist. The test cases are adequate to the coverages and their statistics are correct.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.1
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• pp.129-134
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• 2013

Previous research is focus on testcase generation automation using message sequence diagram based on metamodel. but that research is not enough for testcase genaeration automation using state diagram based metamodel. so in this paper is adopt Model Driven Architecture (MDA) mechanism for using metamodel and model transformation. and we suggest testcase automation mechanism using state diagram in UML. we will decrease cost of embedded software design and testcase genaration and increase quality of embedded software using metamodel mechanism.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.2
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• pp.89-97
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• 2009

Embedded systems widely used in ubiquitous environments usually employ an event-driven programming model instead of thread-based programming model in order to create a more robust system that uses less memory. However, as the software for embedded systems becomes more complex, it becomes hard to program as a single event handler using the event-driven programming model. This paper discusses the implementation of non-preemptive real-time scheduling theory for the design of embedded systems. To this end, we present an efficient schedulability test method for a given non-preemptive task set using a sufficient condition. This paper also shows that the notion of sub-tasks in embedded systems can overcome the problem of low utilization that is a main drawback of non-preemptive scheduling.