• Title/Summary/Keyword: Embedded Memory

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Embedded systems through cost-effective real-time production information systems development (임베디드시스템을 통한 경제적인 실시간 생산정보시스템 개발)

  • Jung, Young-Deuk;Park, Joo-Sik
    • Journal of the Korea Safety Management & Science
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    • v.14 no.4
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    • pp.219-227
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    • 2012
  • The trend is going to obtain the accurate and fast information to the development of information technology and electronic technology as an important part of corporate management. Press equipment to produce products that target is small and medium businesses. Became so economical real-time production information system(R-PIS) model has been implemented. R-PIS configure the embedded hardware and PC application software. This system is easy maintenance and upgrade that general-purpose PC and a modular hardware devices. Consists of modules such as wireless communication, LCD, Key-pad, memory control, and sensor signal. R-PIS is efficient materials and product management to maximize the productivity of the enterprise.

Embedded Object-Oriented Micromagnetic Frame (OOMMF) for More Flexible Micromagnetic Simulations

  • Kim, Hyungsuk;You, Chun-Yeol
    • Journal of Magnetics
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    • v.21 no.4
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    • pp.491-495
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    • 2016
  • We developed an embedded Object-Oriented Micromagnetic Frame (OOMMF) script schemes for more flexible simulations for complex and dynamic mircomagnetic behaviors. The OOMMF can be called from any kind of softwares by system calls, and we can interact with OOMMF by updating the input files for next step from the output files of the previous step of OOMMF. In our scheme, we set initial inputs for OOMMF simulation first, and run OOMMF for ${\Delta}t$ by system calls from any kind of control programs. After executing the OOMMF during ${\Delta}t$, we can obtain magnetization configuration file, and we adjust input parameters, and call OOMMF again for another ${\Delta}t$ running. We showed one example by using scripting embedded OOMMF scheme, tunneling magneto-resistance dependent switching time. We showed the simulation of tunneling magneto-resistance dependent switching process with non-uniform current density using the proposed framework as an example.

Memory Characteristics of High Density Self-assembled FePt Nano-dots Floating Gate with High-k $Al_2O_3$ Blocking Oxide

  • Lee, Gae-Hun;Lee, Jung-Min;Yang, Hyung-Jun;Kim, Kyoung-Rok;Song, Yun-Heub
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.388-388
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    • 2012
  • In this letter, We have investigated cell characteristics of the alloy FePt-NDs charge trapping memory capacitors with high-k $Al_2O_3$ dielectrics as a blocking oxide. The capacitance versus voltage (C-V) curves obtained from a representative MOS capacitor embedded with FePt-NDs synthesized by the post deposition annealing (PDA) treatment process exhibit the window of flat-band voltage shift, which indicates the presence of charge storages in the FePt-NDs. It is shown that NDs memory with high-k $Al_2O_3$ as a blocking oxide has performance in large memory window and low leakage current when the diameter of ND is below 2 nm. Moreover, high-k $Al_2O_3$ as a blocking oxide increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer. From this result, this device can achieve lower P/E voltage and lower leakage current. As a result, a FePt-NDs device with high-k $Al_2O_3$ as a blocking oxide obtained a~7V reduction in the programming voltages with 7.8 V memory.

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Design of the Memory Error Test Module at a Device Driver of the Linux (리눅스 디바이스 드라이버 내의 메모리 오류 테스트 모듈 설계)

  • Jang, Seung-Ju
    • The KIPS Transactions:PartA
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    • v.14A no.3 s.107
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    • pp.185-190
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    • 2007
  • The necessity of error test module is increasing as development of embedded Linux device driver. This paper proposes the basic concept of freed memory error test module in the Linux device driver and designs error test module. The USB device driver is designed for freed memory error test module. I insert the test code to verify the USB device driver. I test the suggested error test module for the USB storage device driver. I experiment error test in this module.

Study on Memory Performance Improvement based on Machine Learning (머신러닝 기반 메모리 성능 개선 연구)

  • Cho, Doosan
    • The Journal of the Convergence on Culture Technology
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    • v.7 no.1
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    • pp.615-619
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    • 2021
  • This study focuses on memory systems that are optimized to increase performance and energy efficiency in many embedded systems such as IoT, cloud computing, and edge computing, and proposes a performance improvement technique. The proposed technique improves memory system performance based on machine learning algorithms that are widely used in many applications. The machine learning technique can be used for various applications through supervised learning, and can be applied to a data classification task used in improving memory system performance. Data classification based on highly accurate machine learning techniques enables data to be appropriately arranged according to data usage patterns, thereby improving overall system performance.

The Des inn and Implementation of Query Engine for Main Memory Database System (주기억 데이터베이스 시스템 질의 엔진의 설계 및 구현)

  • 이경식;김경창
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.04b
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    • pp.121-123
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    • 2002
  • 본 논문에서는 주기억 데이터베이스 시스템을 위만 질의처리 엔진의 설계 및 구현에 대해서 설명하였다. 이를 바탕으로 Embedded SQL 지원을 위한 Pre-compiler 구현 방법 , 단순 질의 및 Join 과정에서의 주기억 장치의 효율적인 사용 방법 , Cursor, Dynamic SQL 처리 방법에 대해 소개하였다.

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Design of BIST Circuits for Test Algorithms Using VHDL (VHDL을 이용한 테스트 알고리즘의 BIST 회로 설계)

  • 배성환;신상근;김대익;이창기;전병실
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.1
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    • pp.67-71
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    • 1999
  • In this paper, we design circuits embedded in memory chip which perform memory testing algorithms using BIST scheme to reduce testing time and cost for testing. In order to implement circuits for MSCAN, Marching and checkerboard test algorithms, which have widely used in memory testing, we survey structure of the BIST circuits and describe each block of BIST circuits by using VHDL. Thereafter, We verify behavior of each VHDL coding block and extract BIST circuits for target testing algorithms by CAD tool for simulation and synthesis. Extracted circuits have very low area overhead.

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Study of the power consumption of ECC circuits designed by various evolution strategies (다양한 진화 알고리즘으로 설계된 ECC회로들의 전력소비 연구)

  • Lee, Hee-Sung;Kim, Eun-Tai
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.1135-1136
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    • 2008
  • Error correcting codes (ECC) are widely used in all types of memory in industry, including caches and embedded memory. The focus in this paper is on studying of power consumption in memory ECCs circuitry that provides single error correcting and double error detecting (SEC-DED) designed by various evolution strategies. The methods are applied to two commonly used SEC-DED codes: Hamming and odd column weight Hsiao codes. Finally, we conduct some simulations to show the performance of the various methods.

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