• The KIPS Transactions:PartA
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• v.13A no.5 s.102
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• pp.387-398
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• 2006

In this paper, we propose a new page allocation scheme for flash memory file system. The proposed scheme allocates pages by exploiting the concept of Purity, which is defined as the fraction of blocks where valid Pages and invalid Pages are coexisted. The Pity determines the cost of block cleaning, that is, the portion of pages to be copied and blocks to be erased for block cleaning. To enhance the purity, the scheme classifies hot-modified data and cold-modified data and allocates them into different blocks. The hot/cold classification is based on both static properties such as attribute of data and dynamic properties such as the frequency of modifications. We have implemented the proposed scheme in YAFFS and evaluated its performance on the embedded board equipped with 400MHz XScale CPU, 64MB SDRAM, and 64MB NAND flash memory. Performance measurements have shown that the proposed scheme can reduce block cleaning time by up to 15.4 seconds with an average of 7.8 seconds compared to the typical YAFFS. Also, the enhancement becomes bigger as the utilization of flash memory increases.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.129-140
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• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.49-56
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• 2005

In this paper, we propose a memory BIST Circuit Creation System which creates BIST circuit based on user defined fault model and generates the optimized march test algorithm. Traditional tools have some limit that regenerates BIST circuit after changing the memory type or test algorithm. However, this proposed creation system can automatically generate memory BIST circuit which is suitable in the various memory type and apply algorithm which is required by user. And it gets more efficient through optimizing algorithms for fault models which is selected randomly according to proposed nile. In addition, it support various address width and data and consider interface of IEEE 1149.1 circuit.

• Journal of the Korean Society of Clothing and Textiles
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• v.34 no.1
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• pp.92-101
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• 2010

This study reports on the development of intelligent clothing using a shape memory alloy (SMA) that forms a still air layer and provides thermal insulation depending on the environment temperature. SMA springs were prepared with Nitinol and have an original length of 6mm and a latent length of 20mm with a response temperature of $24.5^{\circ}C$. Hysteresis was evaluated at a temperature between $0^{\circ}C$ and $40^{\circ}C$. An experimental outdoor jacket that was attached with 30 springs was compared with a commercial jacket in terms of the microclimate temperature, humidity, and comfort properties by human subject tests in the microclimate chamber set at $5{\pm}0.5^{\circ}C$. The results showed that the microclimate temperature of SMA embedded clothing system from the wear trials was higher than the commercial ones during the rest period after exercise, especially on the skin side. In addition the thermal, humidity, and comfort sensations of SMA embedded clothing were better than the commercial ones.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.6
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• pp.594-598
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• 2008

In this paper we propose a fast booting technique based on Improved snapshot boot in embedded Linux, widely adopted in personal devices such as PDA and mobile phones. The existing Snapshot boot technique tries to create a snapshot image at the time of suspend, and later load the entire snapshot image into the system memory at the predefined location with the help of a bootloader at the time of resume. Since a bootloader has to copy the entire snapshot image into the predefined memory to resume the previous suspended computing state, a little bit long time is required to resume. Improved snapshot boot does not create a snapshot image consisting of whole memory pages at the time of suspend, thus resulting in smaller snapshot image than the existing snapshot boot. The remaining pages are in the swap area. The resulting smaller sized snapshot image enables much faster booting latency. Through the experiment, we can see the booting latency is reduced almost 30% with suspend image of 2982 pages. This result depends on the amount of swap-out pages.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.4
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• pp.333-337
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• 2004

This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

• Korean Journal of Materials Research
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• v.34 no.3
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• pp.152-162
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• 2024

In this study, we introduce a novel TiN/Ag embedded TiO₂/FTO resistive random-access memory (RRAM) device. This distinctive device was fabricated using an environmentally sustainable, solution-based thin film manufacturing process. Utilizing the peroxo titanium complex (PTC) method, we successfully incorporated Ag precursors into the device architecture, markedly enhancing its performance. This innovative approach effectively mitigates the random filament formation typically observed in RRAM devices, and leverages the seed effect to guide filament growth. As a result, the device demonstrates switching behavior at substantially reduced voltage and current levels, heralding a new era of low-power RRAM operation. The changes occurring within the insulator depending on Ag contents were confirmed by X-ray photoelectron spectroscopy (XPS) analysis. Additionally, we confirmed the correlation between Ag and oxygen vacancies (V_o). The current-voltage (I-V) curves obtained suggest that as the Ag content increases there is a change in the operating mechanism, from the space charge limited conduction (SCLC) model to ionic conduction mechanism. We propose a new filament model based on changes in filament configuration and the change in conduction mechanisms. Further, we propose a novel filament model that encapsulates this shift in conduction behavior. This model illustrates how introducing Ag alters the filament configuration within the device, leading to a more efficient and controlled resistive switching process.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.11
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• pp.989-995
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• 2015

Due to the recent increase of the importance and demand of security services, the importance of a surveillance monitor system that makes an automatic security system possible is increasing. As the market for surveillance monitor systems is growing, price competitiveness is becoming important. As a result of this trend, surveillance monitor systems based on an embedded system are widely used. In this paper, an object detection algorithm based on an embedded system for a surveillance monitor system is introduced. To apply the object detection algorithm to the embedded system, the most important issue is the efficient use of resources, such as memory and processors. Therefore, designing an appropriate algorithm considering the limit of resources is required. The proposed algorithm uses two background models; therefore, the embedded system is designed to have two independent processors. One processor checks the sub-background models for if there are any changes with high update frequency, and another processor makes the main background model, which is used for object detection. In this way, a background model will be made with images that have no objects to detect and improve the object detection performance. The object detection algorithm utilizes one-dimensional histogram distribution, which makes the detection faster. The proposed object detection algorithm works fast and accurately even in a low-priced embedded system.

• Convergence Security Journal
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• v.7 no.4
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• pp.15-21
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• 2007

As the amount of flash memory being used in embedded device is increased and embedded devices become more important in many computing environments, embedded file system security becomes more important issue. Moreover embedded devices can be easily stolen or lost because of it's high portability. If the lost embedded device has very important information, there's no means to protect it except data encryption. For improving embedded devices' security this paper propose design and implementation of flash cryptographic file system. For this purpose YAFFS is used. By the modified YAFFS cryptographic file system, the security of embedded devices can be improved.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.673-676
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• 2003

In this paper, we designed the embedded system used for wireless LAN communication. Embedded system kernel is made from general linux kernel 2.4.18 by applying the ARM patch (2.4.18-rmk7) and the SA1100 patch(2.4.18-rmk7), then porting board level suitable to target system. The SA-1110 PCMCIA interface provides controls for one PCMCIA card slot with a PSKTSEL pin for support of a second slot. The embedded system requires external logic to complete the PCMCIA socket interface. For dual-voltage support, level shifting buffers are required for all SA-1110 input signals. Hot insertion capability requires that each socket be electrically isolated from each other, and from the remainder of the memory system. embedded system is for socket services approaching PCMCIA socket, detecting number of sockets, sensing insertion and removal, and applying power. It also provides interface with Card services. Embedded system supports Host driver for lucent chips that is installed orinoco driver cross compiled. The meaning can say that is doing wireless LAN communication through wireless LAN in imbedded system.