• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1B
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• pp.71-79
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• 2011

This paper proposes a compiled-code simulator generation system based-on machine description language for efficient design space exploration in designing an embedded system optimized for a specific application. The proposed system generates a compiled-code simulator which maintains the functional accuracy of an event-driven simulator by determining instruction fetch and decoding processes statically. Generated simulator takes instruction-level and cycle-level simulation for estimating performances in embedded core. To show the efficiency of the constructed compiled-code simulator generator, architecture exploration had been performed for the JPEG encoder application. Starting with MIPS R3000 processor for one embedded core, the proposed system can produce the core showing optimized execution time for the application programming. In this process, a huge amount of simulation time has been used. Cycle-level compiled-code simulator has the functional accuracy and shows performance improvement by 21.7% in terms of simulation speed on the average when compared with an event-driven simulator.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.6
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• pp.315-321
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• 2014

Mobile computing devices such as smartphones, tablet computers have become the dominant personal computing platforms. Energy efficiency is a prime design requirement for smart devices. In order to reduce the energy consumption of the smart devices, analysis of performance and energy consumption has become important. However, so far, there is no framework for the analysis and systematic approach to improve the power consumption of the heterogeneous multi-core system. In this paper, we describe a new framework for the analysis of heterogeneous multi-core systems. Also, by use of an analysis tool, can be provide reliability and productivity of development results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.6A
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• pp.526-534
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• 2005

This paper presents the structure and function of the system which automatically generates embedded processor cores using the SMDL. Accepting processor description in the SDML, the proposed system generates the processor core, consisting of the pipelined datapath and memory modules together with their control unit. The generated cores support muti-cycle instructions for proper handling of memory accesses, and resolve pipeline hazards encountered in the pipelined processors. Experimental results show the functional accuracy of the generated cores.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2003.10a
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• pp.150-153
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• 2003

Longitudinal strains({$varepsilon}_x$) of the core and skin layers in glass fiber reinforced plastic(GFRP) cross-ply composite laminates have been studied using the embedded optical fiber sensor of totally-reflected extrinsic Fabry-Perot interferometer(TR-EFPI). Foil-type strain gauges bonded on both the upper and lower surfaces were used for the measurement of the surface strains. Both TR-EFPI sensor and strain gauge bonded on the specimen surface showed excellent agreement within -0.0086 ~ +0.0302% strain. It was shown that values of {$varepsilon}_x$ in the interior of the surface layer and the core layer measured by embedded TR-EFPI sensor was significantly higher than that of the specimen surface measured by strain gauges. The experimental results were ascertained with finite element analysis. Embedded TR-EFPI optical fiber sensor could measure accurately the internal strains which were different from the surface.

• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.2
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• pp.55-62
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• 2009

The power consumption of a high-end microprocessor increases very rapidly. High power consumption will lead to a rapid increase in the chip temperature as well. If the temperature reaches beyond a certain level, chip operation becomes either slow or unreliable. Therefore various approaches for Dynamic Thermal Management (DTM) have been proposed. In this paper, we propose a learning based temperature prediction scheme for a multi-core system. In this approach, from repeatedly executing an application, we learn the thermal patterns of the chip, and we control the temperature in advance through DTM. When the predicted temperature may go beyond a threshold value, we reduce the temperature by decreasing the operation frequencies of the corresponding core. We implement our temperature prediction on an Intel's Quad-Core system which has integrated digital thermal sensors. A Dynamic Frequency System (DFS) technique is implemented to have four frequency steps on a Linux kernel. We carried out experiments using Phoronix Test Suite benchmarks for Linux. The peak temperature has been reduced by on average $5^{\circ}C{\sim}7^{\circ}C$. The overall average temperature reduced from $72^{\circ}C$ to $65^{\circ}C$.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.1
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• pp.1-10
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• 2017

Recently, with the ever-increasing complexity of industrial robot systems, it has been greatly attention to adopt a multi-core based motion controller with high cost-performance ratio. In this paper, we propose a software architecture that aims to utilize the computing power of multi-core processors. The key concept of our architecture is to use shared memory for the interplay between threads running on separate processor cores. And then, we have integrated our proposed architecture with an industrial standard compliant IDE for automatic code generation of motion runtime. For the performance evaluation, we constructed a test-bed consisting of a motion controller with Preempt-RT Linux based dual-core industrial PC and a 3-axis industrial robot platform. The experimental results show that the actuation time difference between axes is 10 ns in average and bounded up to 689 ns under $1000{\mu}s$ control period, which can come up with real-time performance for industrial robot.

• Composites Research
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• v.17 no.5
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• pp.15-24
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• 2004

Longitudinal strains (${\varepsilon}_x$) of the core and skin layers in glass fiber reinforced plastic (GFRP) cross-ply composite laminates have been measured using the embedded optical fiber sensor of absolute extrinsic Fabry-Perot interferometer (A-EFPI). Transmission optical microscopy was used to investigate the damage behavior around the A-EFPI sensor. Foil-type strain gauges bonded on both the upper and lower surfaces were used for the measurement of the surface strains. It was shown that values of ${\varepsilon}_x$ in the interior of the skin layer and the core layer measured by embedded A-EFPI sensor were significantly higher than that of the specimen surface measured by strain gauges. The experimental results agreed well with those from finite element analysis on the basis of uniform stress model. Large strains in the core layer led to the occurrence of many transverse cracks which drastically reduced the strain at failure of optical fiber sensor embedded in the core layer.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.651-654
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• 2005

In this paper, we designed ECC(Elliptic Curve Cryptographic) Processor with Bus-splitting mothod for embedded SoC. ECC SIP is designed by VHDL RTL modeling, and implemented reusably through the procedure of logic synthesis, simulation and FPGA verification. To communicate with ARM9 core and SIP, we designed SIP bus functional model according to AMBA AHB specification. The design of ECC Processor for platform-based SoC is implemented using the design kit which is composed of many devices such as ARM9 RISC core, memory, UART, interrupt controller, FPGA and so on. We performed software design on the ARM9 core for SIP and peripherals control, memory address mapping and so on.

• Journal of Electrical Engineering and Technology
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• v.1 no.1
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• pp.58-62
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• 2006

We proposed a novel segment type switched reluctance motor (SRM) in which the segment core was embedded in aluminum (conductive metal) rotor block in order to increase the mechanical strength and easy manufacturing as well as to improve the performance characteristics and reduce the vibration and acoustic noise. This paper explains the operation principle and the drive system and shows the experimental results in comparison with the VR type SRM.

• IEMEK Journal of Embedded Systems and Applications
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• v.17 no.3
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• pp.185-190
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• 2022

We propose a high speed data communication method for motor drive systems with fast control cycle in order to collect state variables of motor control without degrading control performance. Ethernet is chosen for communication device, and multi-core DSP architecture is exploited for communication processing load distribution. The communication program including network protocol stack and motor control program are assigned to two separate cores, and data between two cores are exchanged using interrupt-based inter-process communication mechanism, which enables to achieve a high-speed communication performance without degrading the motor control performance. The performance of developed communication method is demonstrated by real experiments using TCP, UDP and Raw Socket protocols in an experimental setup consisting of TI's TMS320F28388D motor control card and MS Windows PC.