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http://dx.doi.org/10.7840/KICS.2011.36B.1.71

Construction of a Compiled-code Simulator Generation System for Efficient Design Exploration in Embedded Core Design  

Kim, Sang-Woo (서강대학교 전자공학과 CAD & ES 연구실)
Hwang, Sun-Young (서강대학교 전자공학과 CAD & ES 연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.36, no.1B, 2011 , pp. 71-79 More about this Journal
Abstract
This paper proposes a compiled-code simulator generation system based-on machine description language for efficient design space exploration in designing an embedded system optimized for a specific application. The proposed system generates a compiled-code simulator which maintains the functional accuracy of an event-driven simulator by determining instruction fetch and decoding processes statically. Generated simulator takes instruction-level and cycle-level simulation for estimating performances in embedded core. To show the efficiency of the constructed compiled-code simulator generator, architecture exploration had been performed for the JPEG encoder application. Starting with MIPS R3000 processor for one embedded core, the proposed system can produce the core showing optimized execution time for the application programming. In this process, a huge amount of simulation time has been used. Cycle-level compiled-code simulator has the functional accuracy and shows performance improvement by 21.7% in terms of simulation speed on the average when compared with an event-driven simulator.
Keywords
컴파일드 코드 방식 시뮬레이터;성능측정;임베디드 시스템;아키텍처 탐색;머신 기술 언어;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
연도 인용수 순위
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