• 제목/요약/키워드: Embedded Capacitors

검색결과 63건 처리시간 0.03초

다층 PCB에서의 $BaTiO_3$ 세라믹 Embedded capacitors (Composite $BaTiO_3$ Embedded capacitors in Multilayer Printed Circuit Board)

  • 유희욱;박용준;고중혁
    • 한국공작기계학회논문집
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    • 제17권2호
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    • pp.110-113
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    • 2008
  • Embedded capacitor technology is one of the effective packing technologies for further miniaturization and higher performance of electric packaging system. In this paper, the embedded capacitors were simulated and fabricated in 8-layered printed circuit board employing standard PCB processes. The composites of barium titanante($BaTiO_3$) powder and epoxy resin were employed for the dielectric materials in embedded capacitors. Theoretical considerations regarding the embedded capacitors have been paid to understand the frequency dependent impedance behavior. Frequency dependent impedance of simulated and fabricated embedded capacitors was investigated. Fabricated embedded capacitors have lower self resonance frequency values than that of the simulated embedded capacitors due to the increased parasitic inductance values. Frequency dependent capacitances of fabricated embedded capacitors were well matched with those of simulated embedded capacitors from the 100MHz to 10GHz range. Quality factor of 20 was observed and simulated at 2GHz range in the 10 pF embedded capacitors. Temperature dependent capacitance of fabricated embedded capacitors was presented.

내장형 축전기용 유전재료 (Dielectric Materials for Embedded Capacitors)

  • 이호영
    • 마이크로전자및패키징학회지
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    • 제9권2호
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    • pp.61-67
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    • 2002
  • 최근 전자제품의 경박단소화 추세는 전자기기의 크기와 가격의 감소를 이끌어냈으며, 이러한 추세는 당분간 지속될 전망이다. 이에 따라 내장형 수동소자기술에 대한 연구가 활발히 진행되고 있다. 내장형 축전기 제조기술의 핵심은 높은 유전상수를 갖는 재료를 저온에서 인쇄회로판 위에 형성하는 것이다. 본 고에서는 내장형 축전기용 유전재료로 사용되는 재료들에 관하여 간략하게 소개하고자 한다.

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유기 패키징 기판에서의 BTO 기반의 임베디드 MIM 커패시터의 특성 분석 (Characterization of BTO based MIM Capacitors Embedded into Organic Packaging Substrate)

  • 이승재;이한성;박재영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1504-1505
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    • 2007
  • In this paper, fully embedded high Dk BTO MIM capacitors have been developed into a multi-layered organic package substrate for low cost RF SOP (System on Package) applications. These embedded MIM capacitors were designed and simulated by using CST 3D EM simulators for finding out optimal geometries and verifying their applicability. The embedded MIM capacitor with a size of $550\;{\times}\;550\;um^2$ has a capacitance of 5.3pF and quality factor of 43 at 1.5 GHz, respectively. The measured performance characteristics were well matched with 3D EM simulated ones. Equivalent circuit parameters of the embedded capacitors were extracted for making a design library.

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내장형 캐패시터의 설계 파라미터 추출에 관한 연구 (Design parameters of embedded capacitors)

  • 윤희선;유찬세;조현민;이영신;이우성;박종철
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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    • pp.61-66
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    • 2001
  • In this research, the design parameters of embedded capacitors are extracted by modeling and fabrication. The traditional library of capactor has a few problems in applying the circuit. Its capacitance is discrete, so target values in any circuit often can't be obtained in library, To solve this problem, the characteristics of capacitors are detected in the variation with the shape and structure, and then the capacitors with the expected reactance value at target frequency are obtained, In this procedure, 3-dimensional structure simulation is performed to predict the characteiristics of capacitors.

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Capacitance-voltage Characteristics of MOS Capacitors with Ge Nanocrystals Embedded in HfO2 Gate Material

  • Park, Byoung-Jun;Lee, Hye-Ryeong;Cho, Kyoung-Ah;Kim, Sang-Sig
    • 한국전기전자재료학회논문지
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    • 제21권8호
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    • pp.699-705
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    • 2008
  • Capacitance versus voltage (C-V) characteristics of Ge-nanocrystal (NC)-embedded metal-oxide-semiconductor (MOS) capacitors with $HfO_2$ gate material were investigated in this work. The current versus voltage (I-V) curves obtained from Ge-NC-embedded MOS capacitors fabricated with the $NH_3$ annealed $HfO_2$ gate material reveal the reduction of leakage current, compared with those of MOS capacitors fabricated with the $O_2$ annealed $HfO_2$ gate material. The C-V curves of the Ge-NC-embedded MOS capacitor with $HfO_2$ gate material annealed in $NH_3$ ambient exhibit counterclockwise hysteresis loop of about 3.45 V memory window when bias voltage was varied from -10 to + 10 V. The observed hysteresis loop indicates the presence of charge storages in the Ge NCs caused by the Fowler-Nordheim (F-N) tunneling. In addition, capacitance versus time characteristics of Ge-NC-embedded MOS capacitors with $HfO_2$ gate material were analyzed to investigate their retention property.

Memory Characteristics of MOS Capacitors Embedded with Ge Nanocrystals in $HfO_2$ Layers by Ion Implantation

  • Lee, Hye-Ryoung;Choi, Sam-Jong;Cho, Kyoung-Ah;Kim, Sang-Sig
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.147-148
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    • 2006
  • Ge nanocrystals(NCs)-embedded MOS capacitors are charactenzed in this work using capacitance-voltage measurement. High-k dielectrics $HfO_2$ are employed for the gate material m the MOS capacitors, and the C-V curves obtained from $O_2-$ and $NH_3$-annealed $HfO_2$ films are analyzed.

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탄소나노튜브를 첨가한 4H-SiC MOS 캐패시터의 전기적 특성 (Electrical Characteristics of Carbon Nanotube Embedded 4H-SiC MOS Capacitors)

  • 이태섭;구상모
    • 한국전기전자재료학회논문지
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    • 제27권9호
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    • pp.547-550
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    • 2014
  • In this study, the electrical characteristics of the nickel (Ni)/carbon nanotube (CNT)/$SiO_2$ structures were investigated in order to analyze the mechanism of CNT in MOS device structures. We fabricated 4H-SiC MOS capacitors with or without CNTs. CNT was dispersed by isopropyl alcohol. The capacitance-voltage (C-V) and current-voltage (I-V) are characterized. Both devices were measured by Keithley 4200 SCS. The experimental flatband voltage ($V_{FB}$) shift was positive. Near-interface trap charge density ($N_{it}$) and negative oxide trap charge density ($N_{ox}$) value of CNT embedded MOS capacitors was less than that values of reference samples. Also, the leakage current of CNT embedded MOS capacitors is higher than reference samples. It has been found that its oxide quality is related to charge carriers and/or defect states in the interface of MOS capacitors.

3D EM Simulator를 이용한 Embedded Capacitor의 SRF(Self Resonance Frequency) 특성 분석 (Using the 3D EM simulator analyze characteristics of the self resonance frequency of the embedded capacitor)

  • 유희욱;구상모;박재영;고중혁
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1366-1367
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    • 2006
  • Embedded capacitor technology is one of the effective packaging technologies for further miniaturization and higher performance of electric package systems. So we used the 3D EM simulator for embedded capacitor design in 8-layed PCB(Printed Circuit Board). The designed capacitors value are 2 pF, 5pF, 10 pF, respectly. we investigated characteristics of capacitance - frequency and SRF(Self Resonance Frequency) as changing the rate of hight and width of upper pad of embedded capacitors.

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임베디드 커패시터의 응용을 위해 CCL 기판 위에 평가된 BMN 박막의 특성 (The Properties of $Bi_2Mg_{2/3}Nb_{4/3}O_7$ Thin Films Deposited on Copper Clad Laminates For Embedded Capacitor)

  • 김혜원;안준구;안경찬;윤순길
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.45-45
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    • 2007
  • Capacitors among the embedded passive components are most widely studied because they are the major components in terms of size and number and hard to embed compared with resistors and inductors due to the more complicated structure. To fabricate a capacitor-embedded PCB for in-line process, it is essential to adopt a low temperature process (<$200^{\circ}C$). However, high dielectric materials such as ferroelectrics show a low permittivity and a high dielectric loss when they are processed at low temperatures. To solve these contradicting problems, we studied BMN materials as a candidate for dielectric capacitors. processed at PCB-compatible temperatures. The morphologies of BMN thin films were investigated by AFM and SEM equipment. The electric properties (C-F, I-V) of Pt/BMN/Cu/polymer were evaluated using an impedance analysis (HP 4194A) and semiconductor parameter analyzer (HP4156A). $Bi_2Mg_{2/3}Nb_{4/3}O_7$(BMN) thin films deposited on copper clad laminate substrates by sputtering system as a function of Ar/$O_2$ flow rate at room temperature showed smooth surface morphologies having root mean square roughness of approximately 5.0 nm. 200-nm-thick films deposited at RT exhibit a dielectric constant of 40, a capacitance density of approximately $150\;nF/cm^2$, and breakdown voltage above 6 V. The crystallinity of the BMN thin films was studied by TEM and XRD. BMN thin film capacitors are expected to be promising candidates as embedded capacitors for printed circuit board (PCB).

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저가형 유기 SOP 적용을 위한 저온 공정의 $BaTiO_3$ 임베디드 커페시터 설계 및 제작 (Design and Fabrication of Low Temperature Processed $BaTiO_3$ Embedded Capacitor for Low Cost Organic System-on-Package (SOP) Applications)

  • 이승재;박재영;고영주
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1587-1588
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    • 2006
  • Tn this paper, PCB (Printed Circuit Board) embedded $BaTiO_3$ MIM capacitors were designed, fabricated, and characterized for low cost organic SOP applications by using 3-D EM simulator and low temperature processes. Size of electrodes and thickness of high dielectric films are optimized for improving the performance characteristics of the proposed embedded MIM capacitors at high frequency regime. The selected thicknesses of the $BaTiO_3$ film are $12{\mu}m$, $16{\mu}m$, and $20{\mu}m$. The fabricated MIM capacitor with dielectric constant of 30 and thickness of $12{\mu}m$ has capacitance density of $21.5p\;F/mm^2$ at 100MHz, maximum quality factor of 37.4 at 300 MHz, a quality factor of 30.9 at 1GHz, self resonant frequency of 5.4 GHz, respectively. The measured capacitances and quality factors are well matched with 3-D EM simulated ones. These embedded capacitors are promising for SOP based advanced electronic systems with various functionality, low cost, small size and volume.

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