• 한국전자파학회논문지
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• 제23권12호
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• pp.1359-1364
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• 2012

칩 인덕터를 이용하여 넓은 저지 대역과 소형화 특성을 갖는 C-밴드 semi-lumped 저역 통과 여파기를 제안하였다. 칩 인덕터의 자기 공진 주파수(SRF: Self Resonance Frequency) 특성을 유지하기 위하여 추가된 분리형 인덕터와 SRF 특성으로 인해 발생되는 감쇠 폴을 이용하여 광대역 저지 대역과 높은 저지 특성을 얻을 수 있었다. 3차 elliptic function 여파기에 칩 인덕터(L: 9.1 nH, SRF: 5.5 GHz, Q: 25)를 적용한 결과, 마이크로스트립 라인 인덕터로 구현한 여파기보다 크기가 37.4 % 감소하였으며, 삽입 손실이 0.38 dB, 차단 주파수는 920 MHz, 1.43~7.8 GHz의 넓은 저지 대역(20 dB 이하) 특성을 가졌다.

• ETRI Journal
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• 제35권3호
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• pp.538-541
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• 2013

A compact microstrip lowpass filter (LPF) with an elliptic function response is proposed. A high equivalent capacitance and inductance between the structures of the resonator result in the sharp transition band of 0.04 GHz from 4 GHz to 4.04 GHz with an attenuation level of -3 dB and -20 dB, respectively. To improve the LPF rejection band, multiple open stubs are connected to the proposed resonator. A filter with a 3-dB cut-off frequency at 4 GHz is designed, fabricated, and measured, and agreement between the measured and simulated results is achieved. The results show that a stopband bandwidth of 131% with a suppression level better than -20 dB is obtained while achieving a compact size with a wide stopband.

• 한국전자통신학회논문지
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• 제13권5호
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• pp.965-970
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• 2018

본 논문에서는 두 장의 기판을 이용하여 접힌 기판 집적형 도파관 구조의 활용을 위한 트랜지션이 제안되었고, 이러한 FSIW 구조는 간단한 대역통과 필터로 응용되었다. FSIW 구조는 SIW 구조와 유사한 특성을 가지며 도파관의 장축을 반으로 줄일 수 있다는 장점이 있다. FSIW 구조의 트랜지션은 접지에 연결된 ${\lambda}g/4$ 선로를 이용하여 설계되었고, FSIW 구조의 대역통과 필터는 5단의 타원함수 특성을 갖는 저역통과 필터를 FSIW 구조의 입출력부에 연결하여 설계하였다. 제작된 FSIW 구조의 대역통과 필터는 중심주파수 5.75 GHz, 대역폭 33.2%를 가졌고, 중심주파수에서 삽입 손실과 반사 손실은 각각 0.63dB와 19.1dB를 가졌다.

• 전기학회논문지
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• 제56권2호
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• pp.424-427
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• 2007

A fully differential transconductor using the series composite transistor is proposed. Simulation results show that THD is less than 1.2% for the differential input signal of up to $1.5V_{p-p}$ when the input signal frequency is 10MHz. i he proposed transconductor is used to design a third-order elliptic Gm-C lowpass filter with 138kHz cutoff frequency for ADSL Tx filter. The design procedure is based on signal flow graph(SFG) of a doubly-terminated LC ladder filter by means of fully differential transconductors and capacitors. The filter is fabricated and measured with a $0.35{\mu}m$ CMOS process.

• 전자공학회논문지B
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• 제30B권7호
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• pp.42-49
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• 1993

In this paper, switched-capacitor building block presented which are suitable for implementation in GaAs MESFET technology. They include a current source, a gain stage, and an operational amplifier. Switched-capacitor design techniques are discussed that minimize filter sentsitivity to finite gain of the GaAs operational amplifier. Simulation results are presented on third-order elliptic lowpass ladder filter at a sampling rate of 5GHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.257-260
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• 2000

In this paper, a Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback (CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using 0.25${\mu}{\textrm}{m}$ CMOS n-well parameters. The simulation results show 105MHz cutoff frequency and 2.4㎽ power dissipation with a 2.5V supply voltage.

• 전기학회논문지
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• 제57권8호
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• pp.1464-1469
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• 2008

A CMOS Gm-C filter with variable cutoff frequency applicable for using in the direct conversion receiver is designed. The designed filter comprises the CMOS differential transconductors, and the gm of the transconductor is controlled by the bias voltage. This configuration can compensate variant of the cutoff frequency which could be generated by external noises, and also be used in multiband receiver. As a results of HSPICE simulation, the control range of the cutoff frequency is $1.5MHz{\sim}3.5MHz$ and the gain control range is $-2.8dB{\sim}2.6dB$. The layout of the designed 5th-order Elliptic low-pass filter is performed to fabricate a chip using $2.5V-0.25{\mu}m$ CMOS processing parameter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.348-351
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• 2001

In this paper, the Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback(CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using TSMC $0.35{\mu}m$ CMOS n-well parameters. The simulation results show 138kHz cutoff frequency and 11.05mW power dissipation with a 3.3V supply voltage.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2006년도 하계학술대회
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• pp.202-204
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• 2006

A new method is presented to design RF filters without the Similarity Transform of their coupling coefficient matrix as circuit parameters which is very tedious due to pivoting and deciding rotation angles needed during the iterations. The transfer function of a filter is directly used for the design and its desired form is derived by the optimized rational-function fitting technique. A 3rd order Coaxial Lowpass filter and an 8th order dual-mode elliptic integral function response filter are taken as an example to validate the proposed method.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권4호
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• pp.286-292
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• 2006

This paper presents the design of a low-voltage wide-band switched-capacitor (SC) filter for wireless communication receiver applications. The filter is the 5th-order Elliptic lowpass filter. With the clock frequency of 50MHz implying that an effective sampling frequency is 100MHz with double sampling scheme, the cut-off frequency of the filter is programmable to be 1.25MHz, 2.5MHz, 5MHz and 10MHz. For low-power systems powered by a single-cell battery, the SC filter was elaborately designed to operate at 1.2V power supply. Simulation result shows that the 3rd-order input intercept point (IIP3) can be up to 27dBm. The filter was fabricated in a $0.25-{\mu}m$ 1P5M standard CMOS technology and measured frequency responses show good agreement with the simulation ones. The current consumption is 34mA at a 1.2V power supply.