• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.988-991
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• 2004

In the present investigation, we tried AR coating simulation by using the "Essential Macleod optical coating design and analysis" program. After various run of the program we selected appropriate materials which have specific refractive indices and for that thickness was optimized to get the low reflectance. By comparing the simulated results for the different materials,we found that $SiO_2$ and TiN are the appropriate materials for this Flat panel device (FPD) application. Thin films of these materials were deposited using RF magnetron sputtering and Inductively Coupled Plasma Chemical Vapour Deposition (ICPCVD) methods on Polyethyleneterephthalate (PET) substrates. Spectroscopic ellipsometer (SE MF-1000) and UV-Vis spectrophotometer (SCINCO) were used for the optical characterization. The obtained experimental results are in good agreement with the simulation results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.292-292
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• 2009

OLED(Organic Light Emitting Device)는 LCD(Liquid Crystal Display)의 뒤를 잇는 차세대 디스플레이의 선두주자로서 자체발광형이기 때문에 백라이트 등의 보조광원이 불필요하며, 구동전압이 낮고 넓은 시야각과 빠른 응답속도 등의 특징을 가지고 있다. 또한 플렉서블 기판을 사용할 수 있어 차세대 디스플레이인 플렉서블 디스플레이에 적합하다. 플렉서블한 디스플레이를 만들기 위해서 플라스틱 기판에 OLED 물질을 사용하여 기존에 무겁고, 깨지기 쉬우며, 변형이 불가능한 유리로 만든 소자 보다 더 가볍고 깨지지 않고 변형이 가능한 플렉서블 디스플레이를 제작 할 수 있다. 그러나 플라스틱 기판은 매우 큰 투습율을 가지고 있어 OLED소자에 적용시키면 공기 중의 수분이나 산소와 접촉이 많아져 쉽게 산화되어 소자의 효율 및 수명이 짧아진다. 또한 OLED에 사용되는 유기물도 산소나 수분에 의해 특성이 급격히 저하되기 때문에 산소 및 수분의 차단은 필수적이다. 이러한 단점을 최소화하기 위해서 PECVD(Plasma Enhanced Chemical Vapor Deposition)로 만든 SiON(Silicon Oxynitride) 박막을 차단막(Passivation layer)으로 사용하였다. PECVD를 이용하여 SiON 박막을 증착시킬 때 RF Power, 공정압력, Distance의 변화에 따른 박막의 결정화도, 수분투습도, 광투과도 등의 특성을 FT-IR(Fourier Transform Infrared Spectroscopy), Ellipsometer, UV-visible Spectrophotometer, MOCON를 이용하여 SiON 박막의 특성을 고찰하였다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.61-61
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• 2003

CMP(Chemical Mechanical Polishing)는 VLSI의 제조공정에서 실리콘웨이퍼의 절연막내에 있는 토포그래피를 제어할 수 있는 광역 평탄화 기술이다. 또한 최근에는 실리콘웨이퍼의 나노토포그래피(Nanotopography)가 STI의 CMP 공정에서 연마 후 필름의 막 두께 변화에 많은 영향을 미치게 됨으로 중요한 요인으로 대두되고 있다. STI CMP에 사용되는 CeO$_2$ 슬러리에서 첨가되는 계면활성제의 농도에 따라서 나노토포그래피에 미치는 영향을 제어하는 것이 필수적 과제로 등장하고 있다. 본 연구에서는 STI CMP 공정에서 사용되는 CeO$_2$ 슬러리에서 계면활성제의 농도에 따른 나노토포그래피의 의존성에 대해서 연구하였다. 실험은 8 "단면연마 실리콘웨이퍼로 PETEOS 7000$\AA$이 증착 된 것을 사용하였으며, 연마 시간에 따른 나노토포그래피 의존성을 알아보기 위해 연마 깊이는 3000$\AA$으로 일정하게 맞췄다. 그리고 CMP 공정은 Strasbaugh 6EC를 사용하였으며, 패드는 IC1000/SUBA4(Rodel)이다. 그리고 연마시 적용된 압력은 4psi(Pounds per Square Inch), 헤드와 정반(table)의 회전속도는 각각 70rpm이다 슬러리는 A, B 모두 CeO$_2$ 슬러리로 입자크기가 다른 것을 사용하였고, 농도를 달리한 계면활성제가 첨가되었다. CMP 전 후 웨이퍼의 막 두께 측정은 Nanospec 180(Nanometrics)과 spectroscopic ellipsometer (MOSS-ES4G, SOPRA)가 사용되었다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.63-63
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• 2003

The nanotopography of silicon wafers has emerged as an important factor in the STI process since it affects the post-CMP thickness deviation (OTD) of dielectric films. Ceria slurry with surfactant is widely applied to STI-CMP as it offers high oxide-to-nitride removal selectivity. Aiming to control the nanotopography impact through ceria slurry characteristics, we examhed the effect of surfactant concentration and abrasive size on the nanotopography impact. The ceria slurries for this study were produced with cerium carbonate as the starting material. Four kinds of slurry with different size of abrasives were prepared through a mechanical treatment The averaged abrasive size for each slurry varied from 70 nm to 290 nm. An anionic organic surfactant was added with the concentration from 0 to 0.8 wt %. We prepared commercial 8 inch silicon wafers. Oxide Shu were deposited using the plasma-enhanced tetra-ethyl-ortho-silicate (PETEOS) method, The films on wafers were polished on a Strasbaugh 6EC. Film thickness before and after CMP was measured with a spectroscopic ellipsometer, ES4G (SOPRA). The nanotopogrphy height of the wafer was measured with an optical interferometer, NanoMapper (ADE Phase Shift)

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1266_1267
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• 2009

신재생 에너지 태양광을 활용하기 위한 태양광 발전에 있어서 기존의 고가의 실리콘 기판 대신 저가의 박막형 태양전지 연구가 활발히 진행 되고 있다. 본 연구에서는 박막형 태양전지에 있어서 태양광의 투과층으로 사용되는 CdS 박막의 열처리에 따른 특성을 연구하였다. 실험은 CdS박막을 Sputtering법으로 동일한 조건에서 제조하였고 이 박막을 $200^{\circ}C$, $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$까지 열처리 하였다. 열처리 전과 후 Ellipsometer를 이용한 박막의 두께 변화, 표면의 RMS Roughness와 Peak to Valley Roughness의 변화 그리고 결정 구조변화 등을 조사하였다. 박막의 두께는 열처리 전보다 처리 후 두께가 얇아졌으나 거칠기나 결정성은 열처리 온도에 따라 거칠어지고 결정성이 떨어졌다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.3
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• pp.1279-1283
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• 2012

SiOC films made by the inductive coupled CVD with dimethyldimethoxysilane were analyzed to find out the correlation between the chemical and optical properties by using the Foruier transform infrared spectroscopy, spectrophotometer and ellipsometer. The bonding structure of SiOC film was formed during the depositeion and the adhesion was increased after annealing process. SiOC film decreased the polarization by the chemical reaction between alkyl group and hydroxyl group, and increased the degree of amorphism. For the range of 950 cm-1 in FTIR spectra, the spectra were divided into two types depending on polar sites. The refractive index of SiOC film with the lowest polarization increased and the thickness of that decreased.

• Electrical & Electronic Materials
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• v.9 no.5
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• pp.476-482
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• 1996

The multi-dielectric layer SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$(ONO) is used to improve electrical capacitance and to scale down the memory device. In this paper, improvement of the capacitance by reducing the bottom oxide thickness in the nitride deposition with load lock(L/L) vacuum system is studied. Bottom oxide thickness under the nitride layer is measured by ellipsometer both in L/L and non-L/L systems. Both results are in the range of 3-10.angs. and 10-15.angs., respectively, independent of the nitride and top oxide thickness. Effective thickness and cell capacitance for SONOS capacitor are in the range of 50-52.angs. and 35-37fF respectively in the case of nitride 70.angs. in L/L vacuum system. Compared with non-L/L system, the bottom oxide thickness in the case of L/L system decreases while cell capacitance increases about 4 fF. The results obtained in this study are also applicable to ONO scaling in the thin bottom oxide region of memory stacked capacitor.

• Korean Journal of Materials Research
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• v.14 no.11
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• pp.821-827
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• 2004

Titanium oxide thin films were prepared on Si(100) substrates by R.F. magnetron reactive sputtering at $30\sim200watt$ R.F power range, and annealed at $600^{\circ}C\sim800^{\circ}C$ for 1 hour. The properties of $TiO_2$ thin films were analyzed using x-ray, ${\alpha}-step$, ellipsometer, scanning electron microscopy, and FT-IR spectrometer. Upon in-situ depositions, the initial phase of $TiO_2$ thin film showed non-crystalline phase at R.F. power $30\sim100$ watt. The crosssection of $TiO_2$ thin films were sbserved to be the columnar structure. With the increasing R.F power and annealing temperature, the grain size, crystallinity, refractive index, and void size of titanium oxides showed a tended to increase. The FT-IR transmittance spectra of titanium oxide thin films have the obsorption band of Ti-O bond, Si-O bond, Si-O-Ti bond and O-H bond. With the increase of R.F. power and annealing temperature, these films have the stronger bond structures. It is considered that such a phenomena is due to phase transition and good crystallinity

• Journal of the Korean Ceramic Society
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• v.31 no.11
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• pp.1330-1336
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• 1994

Ta2O5 films were deposited on the p-Si(100) substrates by ECR-PECVD and annealed in O2 atmosphere. The thicknesses of Ta2O5/SiO2 layers were measured by an ellipsometer and a cross-sectional TEM. Annealing in O2 atmosphere enhanced the stoichiometry of the Ta2O5 film and reduced the impurity carbon content. Ta2O5 films were crystallized at the annealing temperatures above 75$0^{\circ}C$. The best leakage current characteristics and the maximum dielectric constant of Ta2O5/SiO2 film capacitor were observed in the specimen annealed at $700^{\circ}C$ and 75$0^{\circ}C$, respectively. The flat band voltage of the Al/Ta2O5/SiO2/p-Si MOS capacitor was varied in the range of -0.6~-1.6 V with the annealing temperature. The conduction mechanism in the Ta2O5 film, the variation of the effective oxide charge density with the annealing temperature, and the effective electric field distribution in the Ta2O5/SiO2 double layer were also discussed.

• Journal of the Korean Ceramic Society
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• v.31 no.7
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• pp.753-758
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• 1994

(100) Si and 4$^{\circ}$off (100) Si were oxidized in dry oxygen, and the differences in thermal oxidation behavior and electrical characteristics between two specimens were investigated. Ellipsometer measurements of the oxide thickness produced by oxidation in dry oxygen from 1000 to 120$0^{\circ}C$ showed that the oxidation rates of the 5$^{\circ}$ off (100) Si were more rapid than those of the (100) Si and the differences between them decreased as the oxidation temperature increased. The activation energies based on the parabolic rate constant, B for (100) and 4$^{\circ}$off (100) Si were 25.8, 28.6 kcal/mol and those on the linear rate constant, B/A were 56.8, 54.9 kcal/mol, respectively. Variation of C-V characteristics with the oxidation temperature showed that the flat band voltages were shifted positively and surface state charge densities decreased as the oxidation temperature increased, and the surface state charge density of the 4$^{\circ}$off (100) Si was lower than that of the (100) Si. Also considerable decrease in the density of oxidation induced stacking faults (OSF) for the 4$^{\circ}$off (100) Si was observed through optical microscopy after preferentially etching off the oxide layer.