• 제목/요약/키워드: Electronic package

검색결과 383건 처리시간 0.032초

Non-Destructive Evaluation of Semiconductor Package by Electronic Speckle Pattern Interferometry

  • Kim, Koung-Suk;Kang, Ki-Soo;Jung, Seung-Tack
    • Journal of Mechanical Science and Technology
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    • 제19권3호
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    • pp.820-825
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    • 2005
  • This paper proposes non-destructive ESPI technique to evaluate inside defects of semiconductor package quantitatively. Inspection system consists of ESPI system, thermal loading system and adiabatic chamber. The technique has high feasibility in non-destructive testing of semiconductor and gives solutions to the drawbacks in previous technique, time-consuming and the difficulty of quantitative evaluation. In result, most of defects are classified in delamination, from which it is inferred to the insufficiency of adhesive strength between layers and nonhomogeneous heat spread. The $90\%$ of tested samples have a delamination defect started at the around of the chip which may be related to heat spread design.

PC 기반의 무인 소화물 접수장치 설계에 관한 연구 (Development of Small Package Drop-Off System)

  • 남병근;한경호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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    • pp.450-452
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    • 2001
  • In this paper, we proposed the automatic postal drop-off system based on the microprocessor board or PC. The weight of the small postal package is transmitted from the electronic scale and user-entered addresses and delivery rate are processed by the controller to calculate the fee. For 24 hour out-door operation and maintenance, non-cash payment methods such as credit card payment is used. The post stamp and receipt are printed by the thermal printer. For the electronic processing of the parcel, serial code is also printed on the stamp and receipts in bar code format. The parcel information obtained by the automatic postal drop-off system is transferred to remote central system by dial-up modem shared by the on site office. The proposed system and its control software are built for prototype model operation and the result met the design requirements. For real time processing, data reception through three serial ports is handled by interrupt routine. The proposed system is expected to be applied for commercial logistics system and pc automation system.

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반도체 패키지의 열변형 해석 시 유한요소 모델의 영향 (The Effect of Finite Element Models in Thermal Analysis of Electronic Packages)

  • 최남진;주진원
    • 대한기계학회논문집A
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    • 제33권4호
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    • pp.380-387
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    • 2009
  • The reliability concerns of solder interconnections in flip chip PBGA packages are produced mainly by the mismatch of coefficient of thermal expansion(CTE) between the module and PCB. Finite element analysis has been employed extensively to simulate thermal loading for solder joint reliability and deformation of packages in electronic packages. The objective of this paper is to study the thermo-mechanical behavior of FC-PBGA package assemblies subjected to temperature change, with an emphasis on the effect of the finite element model, material models and temperature conditions. Numerical results are compared with the experimental results by using $moir{\acute{e}}$ interferometry. Result shows that the bending displacements of the chip calculated by the finite element analysis with viscoplastic material model is in good agreement with those by $moir{\acute{e}}$ inteferometry.

플라스틱 BGA 패키지의 아르곤 가스 플라즈마 처리 효과 (Effect of Ar Gas Plasma Treatment of Plastic Ball Grid Array Package)

  • 신영의;김경섭
    • 한국전기전자재료학회논문지
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    • 제13권10호
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    • pp.805-811
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    • 2000
  • Reliability of PBGA(plastic ball grid array) package is weak compared with normal plastic packages. The low reliability is caused by low resistance to the popcorn cracking, which is generated by moisture absorption in PCB(prited circuit board). In this paper, plasma treatment process was used and we analyzed its effects to interface adhesion. The contents of C and Cl decrease after plasma treatment but those of O, Ca, N relatively increase. The plasma treatment improves the adhesion between EMC(epoxy molding compound) and PCB(solder mask). The grade of improvement was over 100% Max, which depends on the properties of EMC. The RMS(root mean square) roughness value of the solder mask surface increases to plasma treatment. There is little difference of adhesion in RF power and treatment time.

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고분해능 원자 현미경 스캐닝 무아레 기법을 이용한 미소 영역의 변형량 측정 (Measurement of Deformations in Micro-Area Using High Resolution AFM Scanning Moiré Technique)

  • 박진형;이순복
    • 대한기계학회논문집A
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    • 제31권6호
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    • pp.659-664
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    • 2007
  • $Moire\'{e}$ interferometry is a useful technique to assess the reliability of electronic package because $Moire\'{e}$ interferometry can measure the whole-field and real-time deformations. The shear strain of a small crack site is important to the reliability assessment of electronic package. The optical limitation of $Moire\'{e}$ interferometry makes ambiguous the shear strain of a small area. An atomic force microscope (AFM) is used to measure the profile of a micro site. High resolution of AFM can apply to the $Moire\'{e}$ technique. AFM $Moire\'{e}$ technique is useful to measure the shear strain of a small area. In this research, the method to accurately measure the deformation of a small area by using AFM $Moire\'{e}$ is proposed. A phase-shifting method is applied to improve the resolution of AFM $Moire\'{e}$.

유기 패키징 기판에서의 BTO 기반의 임베디드 MIM 커패시터의 특성 분석 (Characterization of BTO based MIM Capacitors Embedded into Organic Packaging Substrate)

  • 이승재;이한성;박재영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1504-1505
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    • 2007
  • In this paper, fully embedded high Dk BTO MIM capacitors have been developed into a multi-layered organic package substrate for low cost RF SOP (System on Package) applications. These embedded MIM capacitors were designed and simulated by using CST 3D EM simulators for finding out optimal geometries and verifying their applicability. The embedded MIM capacitor with a size of $550\;{\times}\;550\;um^2$ has a capacitance of 5.3pF and quality factor of 43 at 1.5 GHz, respectively. The measured performance characteristics were well matched with 3D EM simulated ones. Equivalent circuit parameters of the embedded capacitors were extracted for making a design library.

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적층 유기기판 내에 내장된 소형 LC 다이플렉서의 설계 및 제작 (Design and Fabrication of Miniaturized LC Diplexer Embedded into Organic Substrate)

  • 이환희;박재영;이한성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.262-263
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    • 2007
  • In this paper, fully embedded and miniaturized diplexer has been designed, fabricated, and characterized for dual-band/mode CDMA handset applications. The size of the embedded diplexer is significantly reduced by embedding high Q circular spiral inductors and high DK MIM capacitors into low cost organic package substrate. The fabricated diplexer has insertion losses and isolations of -0.5 and -23dB at 824-894MHz and -0.7 and -22dB at 1850-1990MHz, respectively. Its size is 3.9mm$\times$3.9mm$\times$ 0.77mm (height). The fabricated diplexer is the smallest one which is fully embedded into low cost organic package substrate.

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전자기록 장기보존정책의 현황과 과제 (Long-Term Preservation Strategy of Digital Records)

  • 한능우
    • 기록학연구
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    • 제78호
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    • pp.79-151
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    • 2023
  • 이 연구는 대한민국의 전자기록 장기보존정책의 현황을 분석하고 향후과제를 제시하는데 목적이 있다. 현재 전자기록 장기보존정책은 명확하게 성문화되어 있지는 않지만, 전자서명, 해시, 보존포맷과 장기보존패키지라는 기술요소로 구성된다고 할 수 있다. 각 기술요소를 순서대로 고찰해보고, 변화하는 디지털환경에서 현 정책과 기술의 한계를 분석하고 대안을 제시하였다.