• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1988.10a
• /
• pp.79-81
• /
• 1988

The capacitance-voltage (C-V) characteristics of poly-Si gate MOS devices fabricated by Low-Pressure Chemical Vapor Deposition (LPCVD) system have been studied. In the case poly-Si gate, work function difference and surface state charge density was found lower than that of Al gate. This fact was identified from the C-V curves that flatband shift was shown small due to the hydrogen gas diffused into oxide in processing of alloy and the annealing effect in processing of poly-Si deposition.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.59-62
• /
• 1998

Thermal treatment dependences of MFS devices in $BaMgF_4$ on Si structures have been investigated. $BaMgF_4$ thin films have been directly deposited on the p-Si(100) wafers at a low temperature of $300^{\circ}$ in an ultra high vacuum(UHV) system. After in-situ post-deposition annealing was conducted for 20 s at $650^{\circ}$, bias and temperature were applied to $BaMgF_4/Si$ structures. Although X-ray diffraction analysis showed that the films were polycrystalline in nature before and after bias temperature, the C-V properties were some different between with and without bias-temperature treatment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.253-257
• /
• 1998

Organic-based electroluminescent devices have attracted lots of interests because of their possible application as large-area flat pan디 display. In this study, current-voltage (I-V) characteristics of MEH-PPV thin films was investigated using various metal as a top electrode, where MEH-PPV thin films were prepared on 170 substrate by spin coating method and various metal such as Al, Ag, In, MgIn was deposited on MEH-PPV thin films as a top electrode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.121-124
• /
• 1998

Generally the structure of powder electroluminescent devices (PELDs) on ITO-film was makeup of the ZnS:Cu phosphor layer and BaTiO$_3$ insulating layer. The active layer, which consists of a suitably doped ZnS powder mixed in a dielectric, is sandwiched between two electrodes; one of which are ITO film and the other is aluminum. In this paper, three kinds of powder eleotroluminescent devices (PELDs) : WK-A(ITO/BaTiO$_3$/ZnS:Cu/Silver paste). WK-B(ITO/BaTiO$_3$+ZnS:Cu/Silver paste) and WK-C(ITO/BaTiO$_3$/ZnS:Cu/BaTiO$_3$/Silver paste), fabricated by spin coating method, were investigated. To evaluate the luminescence properties of three kinds of PELDs, EL emission spectroscopy, transferred charge density and time response of EL emission intensity under square wave voltage driving were measured.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.147-150
• /
• 1998

Since P-ELD(powders type electroluminescent device) phenomena were found by G.Destriau at first In 1936, lots of studying was performed in order to realize surface emission devices and flat panel display as a backlight. Due to the problem of low luminance and color and so on, it was delayed. Recently using electric field and thermal effect which can change it\`s molecular arrangement, it can be developed using photoelectric properties of P-ELD. P-ELD in this study was prepared by casting method. Basic structure is ITO/Phosphor/insulator/Al sheet, each layer was mixed by binder, which concentration 11p(poise) for phosphor, 8p(poise) fort insulator. Dielectric properties was investigated first and emission properties of P-ELD based on ZnS:Mn,Cu/ZnS:Cu,Br mixture. P-ELD prepared in this work exhibits about 100cd/㎡ 1-kHz simusoidal excitation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.2
• /
• pp.178-183
• /
• 2004

PBT thin film was known to be a representative for the FeRAM devices because of its good ferroelectric proporties and the ease in fabricating the thin film. However, there have been several problems such as polarization fatigue and leakage current in memory devices with a PZT thin film. In this study, Sm-dolled PZT thin films were fabricated by the so1-gel method, and their ferroelectric and dielectric proportrics were compared as a function of Sm content. We investigated the effect of the Sm dopant on structural and electrical properties of PZT film. Sm-doped PZT thin films on the Pt/Ti/SiO$_2$/Si substrates have been prepared by a sol-gel method. The remanent polarization and coercive field decreased with increasing the concentration of Sm. The dielectric constant and dielectric loss decreased with Increasing Sm content. Sm-doped PZT thin films showed improved fatigue characteristics compared to the undoped PZT thin film.

• Transactions on Electrical and Electronic Materials
• /
• v.5 no.6
• /
• pp.211-214
• /
• 2004

We developed a new systematic calibration procedure which was applied to the calibration of the diffusivity, segregation and TED model of the indium impurity. The TED of the indium impurity has been studied using 4 different groups of experimental conditions. Although the indium is susceptible to the TED, the RTA is effective to suppress the TED effect and maintain a steep retrograde profile. Like the boron, the indium shows significant oxidationenhanced diffusion in silicon and has segregation coefficients at the $Si/SiO_2$ interface much less than 1. In contrast, however, the segregation coefficient of indium decreases as the temperature increases. The accuracy of the proposed technique is validated by SIMS data and $0.13 {\mu}m$ device characteristics such as $V_{th}$ and $Id_{sat}$ with errors less than $5 \%$ between simulation and experiment.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.24 no.4
• /
• pp.325-327
• /
• 2011

In this paper, nonvolatile nano-floating gate memory devices are fabricated with ZnO nanowires and Al nanoparticles on a $SiO_2/Si$ substrate. Al nanoparticles used as floating gate nodes are formed by the sputtering method. The fabricated device exhibits a threshold voltage shift of -1.5 V. In addition, we investigate the endurance and retention characteristics of the nano-floating gate memory device.

• Journal of the Microelectronics and Packaging Society
• /
• v.26 no.4
• /
• pp.15-22
• /
• 2019

Metallic nanowires (MNWs) have recently been considered as one of the most promising candidates for flexible electrodes of advanced electronics including wearable devices, electronic skins, and soft robotics, since they have high aspect ratio in physical shape, low percolation threshold, high ductility and optical transparency. Herein, we review the latest findings related to the MNWs and discuss the properties and potentials of this material that can be used in implementation of various advanced electronic devices.

• Journal of Information Display
• /
• v.4 no.1
• /
• pp.1-8
• /
• 2003

Recent progress in both low pretilt and high pretilt defect free C1 surface stabilized ferroelectric liquid crystal (SSFLC) devices is reviewed. First, by numerical calculation to investigate the balance between surface azimuthal anchoring energy and bulk elastic energy within the confined chevron layer geometry of C1 and C2, it is possible to achieve a zigzag free C1 state by low azimuthal anchoring alignment with a low pretilt angle. The critical azimuthal anchoring coefficient for defect free C1 state is calculated. Its relationship with elastic constant, chevron angle as well as surface topography effect are also discussed. Second, using $5^{\circ}$ oblique SiO deposition alignment method a defect free, large memory angle, high contrast ratio and bistable C1 SSFLC display, which has potential for electronic paper applications has also been developed. The electrooptical properties and bistability of this device have been investigated. Various aspects of defect control are also discussed.