• 농업과학연구
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• 제38권3호
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• pp.525-532
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• 2011

The aim of this study was to develop a portable electronic nose system for freshness measurement of meats, which could be an alterative of subjective measurements of human nose and time-consuming measurements of conventional gas chromatograph methods. The portable electronic system was o optimized by comparing the measurement sensitivity and hardware efficiency, such as power consumption and dimension reduction throughout two stages of the prototypes. The electronic nose systems were constructed using an array of four different metal oxide semiconductor sensors. Two different configurations of sensor array with dimension were designed and compared the performance respectively. The final prototype of the system showed much improved performance on saving power consumption and dimension reduction without decrease of measurement sensitivity of pork freshness. The results show the potential of constructing a portable electronic system for the measurement of meat quality with high sensitivity and energy efficiency.

• 한국전기전자재료학회논문지
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• 제25권5호
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• pp.334-339
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• 2012

A study on electrical and electronic equipment will occur in the atmosphere, which is essential to cut the power to prevent the waste of power by power measurement technology development and to develop the technology to do this operation is the main core of standby power to detect and block it and return the configured for software and hardware, while the actual construction to ensure stability through field testing and debugging of problems improved accordingly, as well as ease of installation and so it could be done while the test. In addition, in terms of basic hardware switching of standby power when blocking, reducing stress and ensure stable operation and circuit design, power off and back to ensure stable operation even when a protection circuit is applied.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.385-386
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• 2008

This paper reports the design of the ultra low power consumption microhotplates for high temperatures. The microhotplates consisting of a platinum-based heating element on AlN/poly 3C-SiC layers were designed. The microhotplate is a $600\times600{\mu}m^2$ square shaped membrane made of $1{\mu}m$ thick ploy 3C-SiC suspended by four legs. The microhotplate was compared with $Si_3N_4/SiO_2/Si_3N_4$(NON) structure microhotplate by COMSOL simulation system. Thermal uniformity, power consumption and thermal characterizations of microhotplates based on 3C-SiC thin film are better than microhotplates with NON structure.

• 한국전기전자재료학회논문지
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• 제17권2호
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• pp.144-149
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• 2004

Register Controlled DLL with fast locking and low-power consumption, is described in this paper. Delay monitor scheme is proposed to achieve the fast locking and inverter is inserted in front of delay line to reduce the power consumption, also. Proposed DLL was fabricated in a 0.6${\mu}{\textrm}{m}$ 1-poly 3-metal CMOS technology. The proposed delay monitor scheme enables the DLL to lock to the external clock within 4 cycles. The power consumption is 36㎽ with 3V supply voltage at 34MHz clock frequency.

• 센서학회지
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• 제27권1호
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• pp.21-24
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• 2018

A temperature sensor with a binary output was implemented using switched-capacitor circuits in a $0.35-{\mu}m$ CMOS(com-plementary metal-oxide semiconductor) process. The measured temperature exhibited good agreement with the oven temperature after calibration. The measured power consumption was 5.61 mW, slightly lower than the simulated power consumption of 6.63 mW.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제15권7호
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• pp.2496-2512
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• 2021

The requirements for powerful computing capability, high capacity, low latency and low energy consumption of emerging services, pose severe challenges to the fifth-generation (5G) network. As a promising paradigm, mobile edge networks can provide services in proximity to users by deploying computing components and cache at the edge, which can effectively decrease service delay. However, the coexistence of heterogeneous services and the sharing of limited resources lead to the competition between various services for multiple resources. This paper considers two typical heterogeneous services: computing services and content delivery services, in order to properly configure resources, it is crucial to develop an effective offloading and caching strategies. Considering the high energy consumption of 5G base stations, this paper considers the hybrid energy supply model of traditional power grid and green energy. Therefore, it is necessary to design a reasonable association mechanism which can allocate more service load to base stations rich in green energy to improve the utilization of green energy. This paper formed the joint optimization problem of computing offloading, caching and resource allocation for heterogeneous services with the objective of minimizing the on-grid power consumption under the constraints of limited resources and QoS guarantee. Since the joint optimization problem is a mixed integer nonlinear programming problem that is impossible to solve, this paper uses deep reinforcement learning method to learn the optimal strategy through a lot of training. Extensive simulation experiments show that compared with other schemes, the proposed scheme can allocate resources to heterogeneous service according to the green energy distribution which can effectively reduce the traditional energy consumption.

• 한국전기전자재료학회논문지
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• 제21권4호
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• pp.289-295
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• 2008

In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with $40\sim60kHz$ frequency and duty ratio of $20\sim88%$. When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.

• 반도체디스플레이기술학회지
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• 제22권1호
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• pp.49-53
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• 2023

In this paper, we propose an antirandom pattern-based test method considering power consumption to compensate for the problem that the fault coverage through random test decreases or the test time increases significantly when the DUT circuit structure is complex or large. In the proposed method, a group unit test pattern generation process and rearrangement process are added to improve the problems of long calculation time and high-power consumption, which are disadvantages of the previous antirandom test.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.329-335
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• 2011

In this paper, a dual-band integer-N frequency divider is proposed for 2.4/5.2 GHz multi-standard wireless local area networks. It consists of a multi-modulus imbalance phase switching prescaler and two all-stage programmable counters. It is able to provide dual-band operation with high resolution while maintaining a low power consumption. This frequency divider is integrated with a 5 GHz VCO for multi-standard applications. Measurement results show that the VCO with frequency divider can work at 5.2 GHz with a total power consumption of 22 mW.

• International Journal of Internet, Broadcasting and Communication
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• 제12권1호
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• pp.90-94
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• 2020

Artificial intelligence (AI) is software that learns large amounts of data and provides the desired results for certain patterns. In other words, learning a large amount of data is very important, and the role of memory in terms of computing systems is important. Massive data means wider bandwidth, and the design of the memory system that can provide it becomes even more important. Providing wide bandwidth in AI systems is also related to power consumption. AlphaGo, for example, consumes 170 kW of power using 1202 CPUs and 176 GPUs. Since more than 50% of the consumption of memory is usually used by system chips, a lot of investment is being made in memory technology for AI chips. MRAM, PRAM, ReRAM and Hybrid RAM are mainly studied. This study presents various memory technologies that are being studied in artificial intelligence chip design. Especially, MRAM and PRAM are commerciallized for the next generation memory. They have two significant advantages that are ultra low power consumption and nearly zero leakage power. This paper describes a comparative analysis of the four representative new memory technologies.