• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.12
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• pp.671-678
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• 2003

This paper proposes an expert system to generate automatically the test table of test system which can highly enhance the quality and productivity of product by inspecting quickly and accurately the defect device on the electronic circuit board tested. The expert system identifies accurately the tested components and the circuit patterns by tracing automatically the connectivity of circuit from electronic circuit database. And it generates automatically the test table to detect accurately the missing components, the misplaced components, and the wrong components for analog components such as resistance, coil, condenser, diode, and transistor, based on the experience knowledge of veteran expert. It is implemented in C computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. And, the validity of the builded expert system is proved by simulating for a typical electronic board model.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05a
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• pp.19-22
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• 2003

본 논문에서는 2차원 영상을 다중 해상도(Multi-Resolution)로 분해하는 이산 웨이블렛 변환 알고리즘을 하드웨어로 구현하기 위한 연구를 하였다. 이 알고리즘을 효율적으로 연산하기 위한 하드웨어 구조를 제시하였고, 이를 VHDL을 통하여 모델링 하였다. 또한 시뮬레이션과 합성을 통하여 기능을 검증하였다.

• Journal of Electrical Engineering and information Science
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• v.1 no.2
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• pp.119-124
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• 1996

Variable step size LMS(VS-LMS) algorithms improve performance of LMS algorithm by means of varying the step size. This paper presents a new VS-LMS algorithm using normalized absolute estimation error. Normalizing the estimation error to the expected valus of the desired signal, we determined the step size using the relative size of estimation error, Because parameters and computational load are less, our algorithm is easy to implement in hardware. The performance of the proposed algorithm is analyzed theoretically and estimated through simulations. Based on the theoretical analysis and computer simulations, the proposed algorithm is shown to be effective compared to conventional VS-LMS algorithms.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.1927-1928
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• 2006

본 논문에서는 카오스 로봇을 제작하기 방법을 제시하고 그 결과를 나타내었다. 카오스 로봇을 제작하기 위하여 가속도 센서를 설계하고 곡선 주행이 가능하며 장애물을 회피하기 위한 알고리즘을 제시하였다.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.9 s.186
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• pp.23-30
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• 2006

• 한국정보컨버전스학회:학술대회논문집
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• 2008.06a
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• pp.181-184
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• 2008

This work was supported by the MIC(Ministry of Information and Communication), Korea, under the ITRC(Information Technology Research Center) support program supervised by the IITA(Institute of Information Technology Assessment) and Yonsei University Institute of TMS Information Technology, a Brain Korea 21 program, Korea. CAD Tools were supported by IDEC.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.727-730
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• 2002

최근 키를 가지고 다니는 불편함과 보안성을 고려한 전자 키들이 많이 생산되고 있다. 키의 불편함과 보안성을 보완하는 방법에는 비밀번호 입력, 지문인식, 홍체인식 등의 방법이 이용되고 있는데, 본 논문에서는 비밀번호를 입력하는 방법으로 설계하였다. Altera사의 Software인 MAXPLUS II를 이용하여 설계하였고, Hardware Language인 VHDL을 이용하였다.

• Proceedings of the Safety Management and Science Conference
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• 2007.04a
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• pp.335-346
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• 2007

This paper introduces reliability stress screening(RSS) for electronic hardware and components. This study also shows reliability centered maintenance(RCM), and reliability growth models. Moreover, this paper presents goodness-of-fit tests and estimation methods of power law model.

• The Journal of the Convergence on Culture Technology
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• v.4 no.3
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• pp.293-298
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• 2018

In the fourth industrial revolution era triggered by the popularization of smart phones, Human daily life and all industrial sites are becoming software and intelligent. With the universal software education for all students nationwide from 2018, Demand is surging, and hardware is interlocked using software technology and Arduino. However, expensive control boards and dozens of different electronic components have to be prepared separately and problems are occurring. In addition, if the same training is repeated, Significantly many parts are lost or destroyed. Being prepared to start a new class is also becoming a very serious problem. In this study, we implement VR technology based on virtualization technology of Arduino board and various electronic parts. In addition, 3D graphics realistic Arduino kit and various electronic components are provided in API form. In this paper, we propose a method of interworking software and virtual hardware on virtualization base.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.85-95
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• 2008

Characteristically, 3D graphic algorithms have to perform complex calculations on massive amount of stream data. The vertex and pixel shaders have enabled efficient execution of graphic algorithms by hardware, and these graphic processors may seem to have achieved the aim of "hardwarization of software shaders." However, the hardware shaders have hitherto been evolving within the limits of Z-buffer based algorithms. We predict that the ultimate model for future graphic processors will be an algorithm-independent integrated shader which combines the functions of both vertex and pixel shaders. We design the register file model that supports 3-dimensional computer graphic on the programmable unified shader processor. we have verified the accurate calculated value using FPGA Virtex-4(xcvlx200) made by Xilinx for operating binary files made by the implementation progress based on synthesis results.