• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.106-108
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• 1994

Electromigration(EM) tests were carried out on Al and Cu films in HV systems to study surface migration. The Al films were made on oxidized silicon wafers by thermal evaporation, in-situ annealed at 300$^{\circ}C$, patterned, and EM tested at 260$^{\circ}C$ and 4.5MA/$\textrm{cm}^2$. SEM observation with back scattered electron mode on the EM tested Al films disclosed that thinning took place under the native Al oxide. In the case of Cu films, tested using in-situ TEM, thinning was also observed at the early stage of void formation even though the thinned areas were much less than those of the Al films.

• Transactions on Electrical and Electronic Materials
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• v.10 no.1
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• pp.5-8
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• 2009

The reliability of multilayer ceramic capacitor with active thin dielectric layer was investigated by highly accelerated life test at various stress condition. The distribution of multilayer ceramic capacitor failure times is plotted as a function of time from Weibull distribution function. According to the test result, voltage acceleration factor is obtained from 2.24 to 2.96. The acceleration by temperature is much higher than other values of active thick dielectric layer. It is clear that median time to failure is affected by the stress voltage for high volumetric efficiency ceramic capacitors with active thin dielectric layer. The degradation under stress of voltage involves electromigration and accumulation of oxygen vacancy at Ni electrode interface of cathode.

• Journal of the Korean institute of surface engineering
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• v.24 no.4
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• pp.196-205
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• 1991

Multi-level thin films are very important in ULSI applications because of their high electromigration resistance. This study presents the effects of titanium, titanium nitride and titanium tungsten underlayers of the stability of multi-aluminum thin films during isothermal annealing. High purity Al(99.999%) films have been electron-beam evaporated on Ti, TiN, TiW films formed on SiO2/Si (P-type(100))-wafer substrates by RF-sputtering in Ar gas ambient. The hillock growth was increased with annealing temperatures. Growth of hillocks was observed during isothermal annealing of the thin films by scanning electron microscopy. The hillock growth was believed to appear due to the recrystallization process driven by stress relaxation during isothermal annealing. Thermomigration damage was also presented in thin films by grain boundary grooving processes. It is shown that underlayers of Al/TiN/SiO2, Al/TiW/SiO2 thin films are preferrable to Al/SiO2 thin film metallization.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.11-18
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• 2013

Interest in copper nanoparticles has increased as an alternative for substituting silver nanoparticles because of its lower cost and less electromigration effect than silver. In this paper, the recent research trends and main results in wet-chemical synthesis of sub-100 nm Cu nanoparticles were summarized. The characteristics of synthesis were discussed with a classification such as modified polyol synthesis, modified hydrothermal synthesis, solvothermal synthesis, and the others, focussing on effects of capping agents, reductants, and pH. Information on the oxidation of synthesized copper nanoparticles were additionally commented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.537-537
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• 2008

Copper (Cu) has been widely used for interconnection structure in intergrated circuits because of its properties such as a low resistance and high resistance to electromigration compared with aluminuim. Damascene processing for the interconnection structure utilizes 2-steps chemical mechanical polishing(CMP). After polishing, the removal of abrasive particles on the surfaces becomes as important as the polishing process. In the paper, buffing process for the removal of colloidal silica from polished Cu wafer was proposed and demonstrated.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.16 no.6
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• pp.181-186
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• 2007

UBM (Under Bump Metallurgy) of flip chip assemblies consists of several layers such as the solder wetting, the diffusion barrier, and the adhesion layers. In addition, IMC layers are formed between the solder wetting layers (e.g. Cu, Ni) and the solder. The primary failure mechanism of the solder joints in flip chips is widely known as the fatigue failure caused by thermal fatigues or electromigration damages. Sometimes, the premature brittle failure occurs in the IMC layers. However, these phenomena have thus far been viewed from only experimental investigations. In this sense, this paper presents a method for solid modeling of IMC layers in flip chip assemblies, thus providing a pre-processing tool for finite element analysis to simulate the IMC failure mechanism. The proposed modeling method is CSG-based and can also be applied to the modeling of UBM structure in flip chip assemblies. This is done by performing Boolean operations according to the actual sequences of fabrication processes

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.6
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• pp.1-7
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• 1993

After the 1%S-Al metal is deposited, a thin oxide is formed thereon. Then, a single charged Argon(Ar$^{+}$) is ion implanted into the oxide layer, thereby causing the metal grain in the upper surface of the metal layer to become amorphous. Consequently, the grain size will be reduced and the rough surface of the metal layer flattened. However, the remainder of the metal layer beneath the upper surface thereof will still exhibit large grain size and low resistance, because the Argon ion is only implanted to characterized by a dual-sized grain structure which served to reduce interlayer stress, thereby decreasing the rate of stress migration, and to lower the resistivity of the metal line, thereby enhancing the electromigration characteristic thereof. Experiments have shown that the metal line exhibits a metal migration rate which is approximately 700% less than the control group and a standard deviation which is approximately 200% less than these group.p.

• Journal of the Korea Society of Computer and Information
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• v.3 no.4
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• pp.63-69
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• 1998

The area optimization of the power distribution network is an important problem in the layout design of VLSI systems. In this paper we propose noval methods to solve the problem of designing minimal area power distribution nets, while satisfying voltage drop and electromigration constraints. We propose two novel greedy heuristics for power net design-one based on bottom-up tree construction using greedy merging and the other based on top-down linearly separable partitioning.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.169-169
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• 2000

최근 반도체 소자의 초고집적화 현상에 따라 기존의 Al-base 합금에 대한 한계에 달하면서 그에 대한 대체 물질로 Cu가 관심을 모으게 되었고 그럼으로써 Cu metallization을 위한 많은 연구가 진행되어 왔다. Cu는 Al-base 합금계보다 비저항이 낮고, 녹는점이 높으며, 또한 electromigration 특성이 뛰어난 것으로 알려져 있다. 공학적인 면에서 이미 이들 계에 대한 adhesion 및 전기적 특성에 대한 많은 연구가 있어왔지만, 이들 특성 변화에 대한 물리적 의미를 제공할 만한 기초 자료들이 부족한 상태이다. 본 연구에서는 부도체인 polyimide 박막과 diffusion barrier인 TiN 박막위에서의 Cu 박막성장에 따르는 interface chemical reaction의 변화를 XPS를 이용하여 관찰함으로서 이들 계에 있어서의 adhesion과의 관계를 조사하였다. 그리고 XPS를 이용한 modified surface accumulation method를 적용시켜 TiN diffusion barrier를 통한 Cu의 grain boundary diffusion 상수들을 측정하였다. Cu/TiN system의 경우에는 interface chemical reaction이 일어나지 않았지만 Cu/polymide system에 있어서는 boundary diffusivity는 특히 40$0^{\circ}C$에서 $650^{\circ}C$ 영역에서, Db=60$\times$10-11exp[-0.29/(kBT)]cm2/sec 이었다.

• Korean Journal of Metals and Materials
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• v.49 no.2
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• pp.180-186
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• 2011

Isothermal annealing and electromigration tests were performed at $125^{\circ}C$ and $125^{\circ}C$, $3.6{\times}10_4A/cm^2$ conditions, respectively, in order to compare the growth kinetics of the intermetallic compound (IMC) in the Cu/thin Sn/Cu bump. $Cu_6Sn_5$ and $Cu_3Sn$ formed at the Cu/thin Sn/Cu interfaces where most of the Sn phase transformed into the $Cu_6Sn_5$ phase. Only a few regions of Sn were not consumed and trapped between the transformed regions. The limited supply of Sn atoms and the continued proliferation of Cu atoms enhanced the formation of the $Cu_3Sn$ phase at the Cu pillar/$Cu_6Sn_5$ interface. The IMC thickness increased linearly with the square root of annealing time, and increased linearly with the current stressing time, which means that the current stressing accelerated the interfacial reaction. Abrupt changes in the IMC growth velocities at a specific testing time were closely related to the phase transition from $Cu_6Sn_5$ to $Cu_3Sn$ phases after complete consumption of the remaining Sn phase due to the limited amount of the Sn phase in the Cu/thin Sn/Cu bump, which implies that the relative thickness ratios of Cu and Sn significantly affect Cu-Sn IMC growth kinetics.