• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1314-1319
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• 2017

A handheld sheet resistance meter that can easily and quickly measure the sheet resistance of indium tin oxide films was developed. The dual-configuration four-point probe method was adopted for this instrument, which measured sheet resistance in the range from $0.26{\Omega}/sq$. to $2.6k{\Omega}/sq$. with 0.3 % ~ 0.5 % uncertainty. The screen of the instrument displayed the sheet resistance when the probe was in contact with the sample surface and the value continued to be displayed during the probe contact. Even after separating the probe from the surface, the value was still displayed on the screen and could be read easily. A feature of the instrument was the use of the dual-configuration technique to reduce edge effects markedly compared with the single-configuration technique and its ease of operation without applying correction factors for sample size and thickness.

• Transactions on Electrical and Electronic Materials
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• 제17권1호
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• pp.46-49
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• 2016

A thin film transistor (TFT) has been fabricated using the amorphous 0.5 wt% Si doped zinc-tin-oxide (a-0.5 SZTO) with different electrodes made of either aluminium (Al) or titanium/aluminium(Ti/Al). Contact resistance and total channel resistance of a-0.5SZTO TFTs have been investigated and compared using the transmission line method (TLM). We measured the total resistance of 1.0×10² Ω/cm using Ti/Al electrodes. This result is due to Ti, which is a material known for its adhesion layer. We found that the Ti/Al electrode showed better contact characteristics between the channel and electrodes compared with that made of Al only. The former showed a less contact and total resistance. We achieved high performance of the TFTs characteristic, such as Vth of 2.6 V, field effect mobility of 20.1 cm² V⁻¹s⁻¹, S.S of 0.9 Vdecade⁻¹, and on/off current ratio of 9.7×10⁶ A. It was demonstrated that the Ti/Al electrodes improved performance of TFTs due to enhanced contact resistance.

• 전기전자학회논문지
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• 제18권1호
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• pp.8-18
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• 2014

Electrical resistance tomography (ERT) has high temporal resolution characteristics therefore it is used as an alternative technique to visualize two-phase flows. The image reconstruction in ERT is highly non-linear and ill-posed hence it suffers from poor spatial resolution. In this paper, the inverse problem is solved with homogeneous data used as a prior information to reduce the condition number of the inverse algorithm and improve the spatial resolution. Numerical experiments have been carried out to illustrate the performance of the proposed method.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2005년도 춘계학술발표대회 개요집
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• pp.31-33
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• 2005

In this study, the interfacial reactions and electrical properties of the Sn-35(wt%)Pb-2(wt%)Ag/Cu BGA solder joints after the thermal shock test were investigated with three different kinds of the underfill used commercially. The microstructural evolutions of the solder joints were observed using a scanning electron microscopy (SEM) and the electrical resistance of the solder joints were evaluated with the numbers of thermal shock cycle using the four-prove method. The increase in the $Cu_{6}Sn_{5}$ IMC thickness led to the increase in the electrical resistance with increasing the numbers of the thermal shock cycle. The increase in the electrical resistance of the BGA packages with the underfill was smaller than that without the underfill. The silica contained underfill led to the higher electrical resistance.

• 한국전기전자재료학회논문지
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• 제22권12호
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• pp.1014-1017
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• 2009

In this study, we studied the nature of thin films formed by holographic photodoping chalcogenide thin films with for use in programmable metallization cell devices(PMC), a type of ReRAM. We formatted straight conduction pathway from the internal interferences of the diffraction gratings which is builded by the holographic lithography method. We investigated the resistance change of solid-electrolyte chalcogenide thin films varied in the applied voltage bias direction from about $1\;M{\Omega}$ to several hundreds of $\Omega$. The switching characteristics of the devices applied holographic lithography method was more improved than ultraviolet exposure condition. As a result of improved resistance change effects, we can analogize that the diffraction gratings is a kind of pattern for straight conduction pathway formation inside the chalcogenide thin films.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회B
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• pp.2007-2010
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• 2008

Vanadium pentoxide ($V_2O_5$) powder was prepared and mixed with Molybdenum Oxides ($MoM_3$) to form Mo-doped and -undoped $VO_2$ films by a sol-gel method on graphite conductive substrates. X-Ray diffraction (XRD) and scanning electron microscopy (SEM) was used to investigate the chemical compositions and microstructures of the Mo-doped and -undoped $VO_2$ films. The variation of electrical resistance was measured as a function of temperature and stoichiometric composition between vanadium and molybdenum. In this study, it was found that Mo-doped and -undoped $VO_2$ shows the typical negative temperature coefficient (NTC) behavior. As the amount of the molybdenum increases, the electrical resistance of Modoped $VO_2$ film gets reduced under the transition temperature and a linear decrease in the transition temperature is observed. From these experimental results, we can conclude that the electrical resistance behavior with temperature change of $VO_2$ films can be utilized as a self-heating source with the electrical current flowing through the graphite substrate.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 추계학술대회 논문집 학회본부 A
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• pp.79-81
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• 2000

Measurement used electrical sounding(MacOHM 2115, Japan) for large scale grounding resistance of So-Yang Dam hydroelectric power plant. To applied measurement method is fall of potential method. This result propose to method of efficient administration for grounding system.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1317-1319
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• 2005

Bottom contact pentacene organic thin-film transistors are fabricated at three different substrate temperatures, $70^{\circ}C$, $80^{\circ}C$ and $90^{\circ}C$. The maximum effective mobility was obtained at $80^{\circ}C$. The contact resistance was extracted by applying two different methods, TLM method and channel-resistance method, and the value shows the minimum at $80^{\circ}C$, which is thought to be the important reason for the best performance.

• 대한토목학회논문집
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• 제44권1호
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• pp.49-62
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• 2024

급격한 도시화로 인한 지하의 무분별한 개발은 기존 지하매설물의 점검과 교체 그리고 새로운 지하시설물 설치에 지연을 일으키고 있다. 최근에는 체계화된 시스템을 도입하여 지하시설물을 관리하고 있지만, 실제 시공은 현장 여건에 따라서 설계 도면과 다르게 진행되기 때문에 기존 지하매설물의 부정확한 위치 정보로 사고가 끊임없이 발생하고 있다. 한편, 전기비저항 탐사는 전극을 지반에 관입시켜 전극 간 전위차로 지반의 전기저항을 측정하는 방식이며, 비파괴 물리탐사 기법으로서 널리 이용되고 있다. 그리고 다수의 전극 쌍을 이용하여 복잡한 지하 구조를 영상화하고, 딥러닝 알고리즘을 활용한 데이터 해석 기술들이 비약적으로 발전하였지만, 아직 지하매설물의 기하학적 조건에 따른 전기저항 변화를 정량적으로 평가한 기초적인 연구로서는 진행된 바가 없다. 본 연구에서는 전극과 지하매설물의 기하학적 매개 변수 해석을 통해서 전기저항 변화를 평가하였다. 먼저, 이론식과 수치 해석의 전기저항값 차이가 작게 나타난 정량화된 메쉬를 적용하여 3차원 전기저항 수치 해석 모듈을 개발하고, 매설물의 깊이, 크기, 그리고 전극과 매설물 간 이격거리에 따른 매개 변수 해석을 통해서 정상 직류 상태에서 전기저항 변화를 정량적으로 비교하였다. 전기저항은 매설물이 얕은 깊이에 위치하고, 크기가 크고, 전극과의 이격거리가 가까울수록 높게 측정되었다. 추가적으로 전극과 지하매설물 주변에 형성된 전위 및 전류밀도 분포를 분석하여 터미널 전극 주변에서 측정된 전기저항을 고찰하였다.

• 한국전기전자재료학회논문지
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• 제23권4호
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• pp.298-302
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• 2010

We investigated the resistance change behavior of SABiT (Samsung Advanced Bump interconnection Technology) technology-applied PCB (Printed Circuit Board) with the various bump sizes and fabrication conditions. Many testing samples with different bump size, prepreg thickness, number of print on the formation of Ag paste bump, were made. The resistance of Ag paste bump itself was calculated from the Ag paste resistivity and bump size, measured by using 4-point probe method and FE-SEM (Field Emission Scanning Electron Microscope), respectively. The contact resistance between Ag paste bump and conducting Cu line were obtained by subtracting the Cu line and bump resistances from the measured total resistance. It was found that the contact resistance drastically changed with the variation of Ag paste bump size and the contact resistance had the largest influence on total resistance. We found that the bump size and contact resistance obeyed the power law relationship. The resistance of a circuit in PCB can be estimated from this kind of relationship as the bump size and fabrication technique vary.