• 한국전기전자재료학회논문지
• /
• 제33권4호
• /
• pp.303-309
• /
• 2020

This study proposes a crack identification algorithm to analyze the surface condition of porcelain insulators and to efficiently visualize cracks. The proposed image processing algorithm for crack identification consists of two primary steps. In the first step, the brightness is eliminated by converting the image to the lab color space. Then, the background is removed by the K-means clustering method. After that, the optimum image treatment is applied using morphological image processing and median filtering to remove unnecessary noise, such as blobs. In the second step, the preprocessed image is converted to grayscale, and any cracks present in the image are identified. Next, the region properties, such as the number of pixels and the ratio of the major to the minor axis, are used to separate the cracks from the noise. Using this image processing algorithm, the precision of crack identification for all the sample images was approximately 80%, and the F1 score was approximately 70. Thus, this method can be helpful for efficient crack monitoring.

• 전기학회논문지
• /
• 제57권4호
• /
• pp.625-628
• /
• 2008

Ba-Zn ferrite powders for electromagnetic insulator were synthesized by self-propagating high-temperature synthesis(SHS) with a reaction of $xBaO_2+(1-x)ZnO+0.5Fe_2O_3+Fe{\rightarrow}Ba_xZn_{1-x}Fe_2O_4$. In this study, phase indentification of SHS products was carried out by using x-ray diffractometry and quasi-nano sized Ba-Zn powders were prepared by a pulverizing process. SHS mechanism was studied by thermodynamical analysis about oxidation reaction among $BaO_2,\;ZnO,\;Fe_2O_3$, and Fe. As oxygen pressure increases from 0.25 MPa to 1.0 MPa, the SHS reactions occur well and make clearly the SHS products. X-ray analysis shows that final SHS products formed with the ratio of $BaO_2/ZnO$ of 0.25, 1.0 and 4.0, are mainly $Ba_xZn_{1-x}Fe_2O_4$. Based on thermodynamical evaluation, the heat of formation increases in the order of $ZnFe_2O_4,\;BaFe_2O_4$, and $Ba_xZn_{1-x}Fe_2O_4$. This supports that $Ba_xZn_{1-x}Fe_2O_4$ phase is predominately formed during SHS reaction. The SHS reactions to form $Ba_xZn_{1-x}Fe_2O_4$ depends on oxygen partial pressure, and the heat of formation during the SHS reaction. The SHS reactions tends to occur well with increasing the oxygen partial pressure and BaO2/ZnO ratio in the reactants This means that the SHS reaction for the formation of Ba-Zn ferrite includes the reduction of BaO2/ZnO and the oxidation of Fe. $Ba_xZn_{1-x}Fe_2O_4$ powders after pulverizing is agglomeratedwith a size of about $50{\mu}m$, in which quasi-nano sized particles with about 300nm are present.

• 한국재료학회지
• /
• 제20권3호
• /
• pp.137-141
• /
• 2010

The $(1-x)La_{0.7}Sr_{0.3}MnO_3(LSMO)/xZnFe_2O_4$(ZFO) (x = 0, 0.01, 0.03, 0.06 and 0.09) composites were prepared by a conventional solid-state reaction method. We investigated the structural properties, magnetic properties and electrical transport properties of (1-x)LSMO/xZFO composites using X-ray diffraction (XRD), scanning electron microscopy (SEM), field-cooled dc magnetization and magnetoresistance (MR) measurements. The XRD and SEM results indicate that LSMO and ZFO coexist in the composites and the ZFO mostly segregates at the grain boundaries of LSMO, which agreed well with the results of the magnetic measurements. The resistivity of the samples increased by the increase of the ZFO doping level. A clear metal-to-insulator (M-I) transition was observed at 360K in pure LSMO. The introduction of ZFO further downshifted the transition temperature (350K-160K) while the transition disappeared in the sample (x = 0.09) and it presented insulating/semiconducting behavior in the measured temperature range (100K to 400K). The MR was measured in the presence of the 10kOe field. Compared with pure LSMO, the enhancement of low-field magnetoresistance (LFMR) was observed in the composites. It was clearly observed that the magnetoresistance effect of x = 0.03 was enhanced at room temperature range. These phenomena can be explained using the double-exchange (DE) mechanism, the grain boundary effect and the intrinsic transport properties together.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
• /
• pp.167-170
• /
• 2004

The stochiometric mix of evaporating materials for the $CuGaT_2$ single crystal thin films was prepared from horizontal furnance. Using extrapolation method of X-ray diffraction patterns for the $CuGaTe_2$ polycrystal, it was found tetragonal structure whose lattice constant $a_0$ and $c_0$ were 6.025 ${\AA}$ and 11.931 ${\AA}$, respectively. To obtain the single crystal thin films, $CuGaTe_2$ mixed crystal was deposited on throughly etched semi-insulator GaAs(100) substrate by the Hot Wall Epitaxy (HWE) system. The source and substrate temperature were $670^{\circ}C$ and $410^{\circ}C$ respectively, and the thickness of the single crystal thin films is $2.1{\mu}m$. The crystalline structure of single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). From the photocurrent spectrum by illumination of perpendicular light on the c - axis of the $CuGaTe_2$ single crystal thin film, we have found that the values of spin orbit coupling ${\Delta}s.o$ and the crystal field splitting ${\Delta}cr$ were $0.079\underline{1}eV$ and $0.246\underline{3}eV$ at 10 K, respectively. From the PL spectra at 10K, the peaks corresponding to free bound excitons and D-A pair and a broad emission band due to SA is identified. The binding energy of the free excitons are determined to be $0.047\underline{0}eV$ and the dissipation energy of the donor-bound exciton and acceptor-bound exciton to be $0.049\underline{0}eV$, $0.055\underline{8}eV$, respectively.

• 한국ITS학회 논문지
• /
• 제7권5호
• /
• pp.97-105
• /
• 2008

반도체 공정의 미세화 및 마이크로 시스템 기술의 발전 그리고 소형 무선PAN 및 이동통신 장치들의 급증으로 인하여 전자부품들의 소형화와 직접화에 대한 요구가 지속적으로 증가되고 있다. 본 연구에서는 휴대형 무선PAN 및 이동통신용 전자회로 설계에 다양한 목적으로 널리 사용되고 있는 기저대역의 수동소자들 중 미세 커패시터의 안정성과 전기적 특성을 확보하기 위하여, 유전체인 AIN을 사용하여 MIM구조로 제작된 미세 박막 커패시터 소자의 전기적인 특성을 분석하고 기저대역에서의 성능을 평가한다. 또한 제작된 미세 박막형 커패시터의 용량제어 방법을 제시함으로서 기저대역에서 범용으로 사용할 수 있는 미세 박막 커패시터의 모델을 제시하고자 한다. 또한, 주파수 대역에 따른 MIM구조의 AIN 커패시터 특성을 분석함으로서 향후 임베디드 소자와 집적화를 위한 고정밀의 미세수동 소자로서의 활용방안을 제시하고자한다.

• 한국전기전자재료학회논문지
• /
• 제37권1호
• /
• pp.48-55
• /
• 2024

The changes in threshold voltage and DIBL were investigated for changes in remanent polarization P_r and coercive field E_c, which determine the characteristics of the P-E hysteresis curve of ferroelectric in NCFET (negative capacitance FET). The threshold voltage and DIBL (drain-induced barrier lowering) were observed for a junctionless double gate MOSFET using a gate oxide structure of MFMIS (metal-ferroelectric-metal-insulator-semiconductor). To obtain the threshold voltage, series-type potential distribution and second derivative method were used. As a result, it can be seen that the threshold voltage increases when P_r decreases and E_c increases, and the threshold voltage is also maintained constant when the P_r/E_c is constant. However, as the drain voltage increases, the threshold voltage changes significantly according to P_r/E_c, so the DIBL greatly changes for P_r/E_c. In other words, when P_r/E_c=15 pF/cm, DIBL showed a negative value regardless of the channel length under the conditions of ferroelectric thickness of 10 nm and SiO₂ thickness of 1 nm. The DIBL value was in the negative or positive range for the channel length when the P_r/E_c is 25 pF/cm or more under the same conditions, so the condition of DIBL=0 could be obtained. As such, the optimal condition to reduce short channel effects can be obtained since the threshold voltage and DIBL can be adjusted according to the device dimension of NCFET and the P_r and E_c of ferroelectric.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제14권5호
• /
• pp.601-608
• /
• 2014

In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of $Al_2O_3$ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to $1323{\Omega}/{\square}$ from the value of $400{\Omega}/{\square}$ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin $Al_2O_3$ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited $Al_2O_3$ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nm-thick $Al_2O_3$ gate insulator exhibited extremely low gate leakage current of $10^{-9}A/mm$, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high $I_{on}/I_{off}$ ratio of ${\sim}10^{10}$. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick $Al_2O_3$ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick $Al_2O_3$ layer due to thinner $Al_2O_3$ layer, as expected. The device with 10 nm-thick $Al_2O_3$ layer, however, showed very high gate leakage current of $5.5{\times}10^{-4}A/mm$ due to poly-crystallization of the $Al_2O_3$ layer during the high-temperature RTP, which led to very poor performances.

• 한국응용과학기술학회지
• /
• 제25권3호
• /
• pp.388-394
• /
• 2008

본 논문에서는 용액 공정을 이용한 고분자 절연층을 갖는 top-gate 구조의 펜타센 박막 트랜지스터(Thin Film Transistor, TFT)의 특성을 연구하였다. Top-gate 구조의 펜타센 TFT 제작에 앞서 유기 반도체인 펜타센의 결정성 성장을 돕기 위해서 가교된 PVP (cross-linked poly(4-vinylphenol))를 유리 기판 상에 스핀 코팅을 이용하여 형성한 후, 노광 공정을 통해 니켈/은 구조를 갖는 채널 길이 $10{\mu}m$의 소오스, 드레인 전극을 형성하였다. 그리고 열 증착을 이용하여 60 nm 두께의 펜타센 층을 성막하였고, 고분자 절연체로서 PVA(polyvinyl alchol) 또는 가교된 PVA를 용액공정인 스핀 코팅을 이용하여 형성한 후 열 증착으로 알루미늄 게이트 전극을 성막하였다. 이로써 제작된 소자들의 전기적 특성을 확인한 결과 가교된 PVA를 사용한 펜타센 TFT 보다 PVA를 게이트 절연체로 사용한 소자가 전기적 특성이 우수한 것으로 관찰되었다. 이는 PVA의 가교 공정에 의한 펜타센 박막의 성능 퇴화에 기인한 것으로 사료된다. 실험 결과 $0.9{\mu}m$ 두께의 PVA 게이트 절연막을 사용한 top-gate 구조의 펜타센 TFT의 전계 효과 이동도와 문턱전압, 그리고 전류 점멸비는 각각, 약 $3.9{\times}10^{-3}\;cm^2/Vs$, -11.5 V, $3{\times}10^5$으로써 본 연구에서 제안된 소자가 용액 공정형 top-gate 유기 TFT 소자로서 우수한 성능을 나타냄을 알 수 있었다.

• 한국재료학회지
• /
• 제10권12호
• /
• pp.807-811
• /
• 2000

MFISFET (Metal-ferroelectric-nsulator-semiconductor-field effect transistor)에의 적용을 위해 CeO$_2$와 SrBi$_2$Ta$_2$O$_{9}$ 박막을 각각 r.f. sputtering 및 pulsed laser ablation법으로 제조하였다. CeO$_2$ 박막은 증착시 스퍼터링개스비 (Ar:O$_2$)에 따른 특성을 고찰하였다. Si(100) 기판 위에 $700^{\circ}C$에서 증착된 CeO$_2$ 박막들은 (200)방향으로 우선방향성을 가지고 성장하였고 $O_2$ 개스량이 증가함에 따라 박막의 우선방향성, 결정립도 및 표면거칠기는 감소하였다. C-V특성에서는 Ar:O$_2$가 1 : 1인 조건에서 제조된 박막이 가장 양호한 특성을 보였다. 제조된 박막들의 누설전류값은 100kV/cm의 전계에서 $10^{-7}$ ~$10^{-8}$ A의 차수를 보였다. CeO$_2$/Si 기판위에 성장된 SBT는 다결정질상의 치밀한 구조를 가지고 성장을 하였다 80$0^{\circ}C$에서 열처리된 SBT박막으로 구성된 MFIS구조의 C-V 특성에서 memory window 폭은 0.9V를 보였으며 5V에서 4$\times$$10^{-7}$ A/$\textrm{cm}^2$의 누설전류밀도를 보였다.

• 한국재료학회지
• /
• 제11권6호
• /
• pp.448-452
• /
• 2001

ZnS:Cu,Cl 형광체를 이용하여 ITO/glaas 기판위에 스크린인쇄법으로 적층형과 혼합형 구조로된 2종류의 교류전계 발광소자를 제작한 후 인가전압과 주파수에 따른 광학적, 전기적 특성을 조사, 비교하였다. 적층헝의 경우 발광휘도는 400Hz, 200V 구동전압에서 약 55 cd/$\m^2$를 나타내었다. 인가전압의 주파수를 400Hz에서 30Hz로 증가시킬 경우 휘도는 420 cd/$\m^2$로 크게 향상되었다. 혼합형의 경우 400Hz의 주파수에서 문턱전압은 45V이었고, 200V, 30KHz 주파수의 동작조건에서 최대휘도는 670 cd/$\m^2$ 이었다. 휘도-전압 특성 측정결과 적층형구조 보다 혼합형 소자구조에서 발광강도가 약 1.5배 증가하였다. 주파수에 따른 주발광 파장의 변화는 양쪽시료 모두 유사하게 나타났다. 1KHz이하의 저주파에서는 652 nm의 청녹색 발광과장을 나타내었으며 5KHz이상에서는 452 nm과장의 청색발광을 나타내었다.