• Journal of Radiation Protection and Research
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• v.47 no.4
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• pp.214-225
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• 2022

Background: The conventional cerium-doped Gd₂Al₂Ga₃O₁₂ (GAGG(Ce)) scintillator-based gamma-ray imager has a bulky detector, which can lead to incorrect positioning of the gammaray source if the shielding against background radiation is not appropriately designed. In addition, portability is important in complex environments such as inside nuclear power plants, yet existing gamma-ray imager based on a tungsten mask tends to be weighty and therefore difficult to handle. Motivated by the need to develop a system that is not sensitive to background radiation and is portable, we changed the material of the scintillator and the coded aperture. Materials and Methods: The existing GAGG(Ce) was replaced with Bi₄Ge₃O₁₂ (BGO), a scintillator with high gamma-ray detection efficiency but low energy resolution, and replaced the tungsten (W) used in the existing coded aperture with lead (Pb). Each BGO scintillator is pixelated with 144 elements (12 × 12), and each pixel has an area of 4 mm × 4 mm and the scintillator thickness ranges from 5 to 20 mm (5, 10, and 20 mm). A coded aperture consisting of Pb with a thickness of 20 mm was applied to the BGO scintillators of all thicknesses. Results and Discussion: Spectroscopic characterization, imaging performance, and image quality evaluation revealed the 10 mm-thick BGO scintillators enabled the portable gamma-ray imager to deliver optimal performance. Although its performance is slightly inferior to that of existing GAGG(Ce)-based gamma-ray imager, the results confirmed that the manufacturing cost and the system's overall weight can be reduced. Conclusion: Despite the spectral characteristics, imaging system performance, and image quality is slightly lower than that of GAGG(Ce), the results show that BGO scintillators are preferable for gamma-ray imaging systems in terms of cost and ease of deployment, and the proposed design is well worth applying to systems intended for use in areas that do not require high precision.

• Journal of Electrochemical Science and Technology
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• v.14 no.4
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• pp.361-368
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• 2023

In lithium-sulfur (Li-S) batteries, encapsulation of sulfur in activated carbon (AC) materials is a promising strategy for preventing the dissolution of lithium polysulfide into electrolytes and enhancing cycle life, because instead of solid-liquid-solid reactions, quasi-solid-state (QSS) reactions occur in the AC micropores. While a high weight fraction of sulfur in S/AC composites is essential for achieving a high energy density of Li-S cells, the deterioration mechanisms under such conditions are still unclear. In this study, we report the deterioration mechanisms during charge-discharge cycling when the discharge products overflow from the AC. Analysis using scanning electron microscopy and energy-dispersive X-ray spectrometry confirms that the sulfur in the S/AC composites migrates outside the AC as cycling progresses, and it is barely present in the AC after 20 cycles, which corresponds to the capacity decay of the cell. Impedance analysis clearly shows that the electrical resistance of the S/AC composite and the charge-transfer resistance of QSS reactions significantly increase as a result of sulfur migration. On the other hand, the charge-discharge cycling performance under limited-capacity conditions, where the discharge products are encapsulated inside the AC, is extremely stable. These results reveal the degradation mechanism of a Li-S cell with micro-porous carbon and provide crucial insights into the design of a S/AC composite cathode and its operating conditions needed to achieve stable cycling performance.

• Journal of IKEEE
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• v.27 no.4
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• pp.624-629
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• 2023

Estimation of signal parameters via rotational invariance techniques (ESPRIT) is an algorithm that estimates the angle of a signal arriving at an array antenna using the shift invariance property of an array antenna. ESPRIT offers the good trade-off between performance and complexity. However, the ESPRIT algorithm still requires high-complexity operations such as covariance matrix and eigenvalue decomposition, so implementation with a hardware processor is essential to estimate the angle of arrival in real time. In addition, ESPRIT processors should have high performance. The performance is related to the number of antennas, and the number of antennas required for each application are different. Therefore, we proposed an ESPRIT processor that provides 2 to 8 variable antenna configurations to meet the performance and complexity requirements according to the applied field. The proposed ESPRIT processor was designed using the Verilog-HDL and implemented on a field programmable gate array (FPGA).

• Journal of IKEEE
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• v.27 no.4
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• pp.368-378
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• 2023

Automotive headlamp with LED matrix exploits low-cost low-speed serial buses such as I2C and SPI for digital LED control. When headlamp resolution increases, LED control data significantly increases to exceed capacity of control bus. This paper proposes HLCP (Headlamp LED Control Protocol), a novel LED maxtrix headlamp protocol. The proposed protocol exploits dedicated instructions to control many LEDs simultaneously, so it can control much more LEDs than conventional control buses although it is basically based on I2C bus. It is designed and verified in Verilog HDL. Simulation results show that HLCP can control LED matrix headlamp more efficiently than I2C and SPI.

• Journal of IKEEE
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• v.27 no.4
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• pp.524-530
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• 2023

This paper proposes an efficient algorithm to detect CAN (Controller Area Network) bus attack based on a lightweight CNN (Convolutional Neural Network), and an IDS(Intrusion Detection System) was designed, implemented, and verified with FPGA. Compared to conventional CNN-based IDS, the proposed IDS detects CAN bus attack on a frame-by-frame basis, enabling accurate and rapid response. Furthermore, the proposed IDS can significantly reduce hardware since it exploits only one convolutional layer, compared to conventional CNN-based IDS. Simulation and implementation results show that the proposed IDS effectively detects various attacks on the CAN bus.

• Journal of IKEEE
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• v.27 no.4
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• pp.683-686
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• 2023

In this paper, we designed a Delayed Dual Core Lock-Step (D-DCLS) processor where two cores operate same instructions with delay and the result is compared to mitigate soft errors and common mode failures in automotive electronic systems. Because D-DCLS does not know which core an error occurred in, each core must be recovered to the point before the error occurred, but complex hardware modifications are required to return all intermediate values on the pipeline stage. In this paper, in order for easy hardware implementation, all register values are saved to a buffer whenever a branch instruction is executed. When an error is detected, the saved register values are automatically restored, and then 'BX LR' instruction is executed to return to the last branch point. The proposed D-DCLS processor was designed using Verilog HDL and was confirmed to continue normal operation after automatically recovering error.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.3
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• pp.83-87
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• 2023

In the field of electronics and semiconductor technology, innovative semiconductor material research to replace Si is actively ongoing. However, while research on alternative materials is underway, there is a significant lack of studies regarding the relationship between 2D materials used as channels in transistors, especially parasitic resistance, and RF (radio frequency) applications. This study systematically analyzes the impact on electrical performance with a focus on various transistor structures to address this gap. The research results confirm that access resistance and contact resistance act as major factors contributing to the degradation of semiconductor device performance, particularly when highly scaled down. As the demand for high-frequency RF components continues to grow, establishing guidelines for optimizing component structures and elements to achieve desired RF performance is crucial. This study aims to contribute to this goal by providing structural guidelines that can aid in the design and development of next-generation RF transistors using 2D materials as channels.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.36 no.6
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• pp.415-421
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• 2023

In this study, the piezoresistive properties of cementitious composites enhanced with carbon nanotubes for improved electrical conductivity were analyzed using a deep learning-based transformer algorithm. Experimental execution was performed in parallel for acquisition of training data. Previous studies on mixture design, specimen fabrication, chemical composition analysis, and piezoresistive performance testing are also reviewed in this paper. Notably, specimens in which fly ash substituted 50% of the binder material were fabricated and evaluated in this study, in addition to carbon nanotube-infused specimens, thereby exploring the potential enhancement of piezoresistive characteristics in conductive cementitious materials. The experimental results showed more stable piezoresistive responses in specimens with fly-ash substituted binder. The transformer model was trained using 80% of the gathered data, with the remaining 20% employed for validation. The analytical outcomes were generally consistent with empirical measurements, yielding an average absolute error and root mean square error between 0.069 to 0.074 and 0.124 to 0.132, respectively.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.124-130
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• 2023

Recently, fan out wafer level packaging, which enables high integration, miniaturization, and low cost, is being rapidly applied in the semiconductor industry. In particular, FOWLP is attracting attention in the mobile and Internet of Things fields, and is recognized as a core technology that will lead to technological advancements such as 5G, self-driving cars, and artificial intelligence in the future. However, as chip density and package size within the package increase, FOWLP warpage is emerging as a major problem. These problems have a direct impact on the reliability and electrical performance of semiconductor products, and in particular, cause defects such as vacuum leakage in the manufacturing process or lack of focus in the photolithography process, so technical demands for solving them are increasing. In this paper, warpage simulation according to the thickness of FOWLP material was performed using finite element analysis. The thickness range was based on the history of similar packages, and as a factor causing warpage, the curing temperature of the materials undergoing the curing process was applied and the difference in deformation due to the difference in thermal expansion coefficient between materials was used. At this time, the stacking order was reflected to reproduce warpage behavior similar to reality. After performing finite element analysis, the influence of each variable on causing warpage was defined, and based on this, it was confirmed that warpage was controlled as intended through design modifications.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.5
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• pp.103-108
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• 2023

In this paper, a performance enhancement study of an AESA antenna that can be applied to a seeker that serves as the eye of a missile was conducted, and the performance of the antenna was verified through actual measurement. When designing an AESA antenna, the optimization of the active reflection coefficient must be considered during transmission due to the mutual coupling between radiators that inevitably occurs, and the selection of a radiator that can overcome the space limitation of the seeker with a small size/light weight is an important design consideration. Accordingly, optimization in terms of electrical performance and low-profile structure is required through research on array antennas for application to the AESA structure. The radiator designed and measured in this paper was designed as an SFN that can satisfy the low-profile structure while enhancing the performance of a general vivaldi antenna. Through this paper, it was confirmed that SFN has the same broadband characteristics as general vivaldi antennas and has optimized characteristics required for AESA antennas. The structure optimized through simulation confirmed the pattern characteristics and active reflection coefficient characteristics through the fabrication of actual proto-type antennas.