• 한국전자거래학회지
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• 제2권1호
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• pp.1-20
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• 1997

This study aims to suggest CALS implementation strategies and policies for information-based management of small and medium companies in Korea. At the turning point from traditional document-based management to recent digital-based one, it is well known that implementation of CALS concept is crucial for advancing business management of small and medium enterprises In order to attack the aim, this paper critically analyzes the empirical difficulties and obstacles of the current information-based management of small and medium companies in Korea. On the basis of the above analysis, this paper suggests the strategic plans and policies of CALS implementation for small and medium enterprises in Korea as follows. First, government should provide the supporting policies and proper system so that the large enterprise can be linked with small and medium companies for sharing necessary information. Second, similar enterprises should be integrated on the basis of information and automation evaluation. Third, implementation strategies and plans should be advanced on the basis of the informationalized phases with respect to the technology level of small and medium enterprises. For more efficient CALS implementation, this paper also proposes the following subsidiary policies. First, it is substantially important to publicize the nation-wide spreading of CALS mind. Second, it is strongly recommended to educate and train CALS specialist on a consistant basis. Third, government should support the enterprises by providing sufficient fund for CALS implementation. Fourth, the ideal CALS implementation models for small and medium enterprises should be developed. Fifth, the consulting and training program for CALS implementation should be established through ECRC (Electronic Commerce Resource Center). My study was based upon the enterprises' responses to the questionaires I made

• 정보보호학회논문지
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• 제33권3호
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• pp.401-410
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• 2023

본 논문에서는 NIST LWC 최종후보 중 하나인 SPARKLE을 64-비트 ARMv8 프로세서 상에서 최적화하는 방안에 대해 제안한다. 제안 방법은 두 가지로서 ARM A64 명령어를 이용한 구현과 NEON ASIMD 명령어를 이용한 구현이다. A64 기반 제안구현은 ARMv8 상에서 가용한 레지스터를 효율적으로 사용할 수 있도록 레지스터 스케줄링을 수행하여 최적화한다. 최적화된 A64 기반 제안구현을 활용할 경우 Raspberry Pi 4B에서 C언어 참조구현보다 1.69~1.81배 빠른 속도를 얻을 수 있다. 두 번째로, ASIMD 기반 제안구현은 하나의 벡터명령어를 통해 3개 이상의 ARX-box를 병렬적으로 수행하도록 데이터를 병렬적으로 구성하여 최적화한다. 최적화된 ASIMD 기반 제안구현은 A64 기반 제안구현보다 일반적인 속도는 떨어지지만, SPARKLE256에서 SPARKLE512로 블록 크기가 증가할 때 A64 기반 제안구현에서는 속도가 2.1배 느려지는 것에 비해 ASIMD 기반제안구현에서는1.2배밖에 느려지지 않다는 장점이 있다. 따라서 기존 SPARKLE보다 더 큰 블록 크기를 갖는 SPARKLE 변형 블록 암호 또는 순열 설계 시 ASIMD 기반 제안구현이 더 효율적이므로 유용한 자료로써 활용 가능하다.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제25권3호
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• pp.66-81
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• 2021

In this paper, we review the lowest order staggered discontinuous Galerkin methods on polygonal meshes in 2D. The proposed method offers many desirable features including easy implementation, geometrical flexibility, robustness with respect to mesh distortion and low degrees of freedom. Discrete function spaces for locally H¹ and H(div) spaces are considered. We introduce special properties of a sub-mesh from a given star-shaped polygonal mesh which can be utilized in the construction of discrete spaces and implementation of the staggered discontinuous Galerkin method. For demonstration purposes, we consider the lowest case for the Poisson equation. We emphasize its efficient computational implementation using only geometrical properties of the underlying mesh.

• 인터넷정보학회논문지
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• 제20권3호
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• pp.25-31
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• 2019

Along with the recent advances in quantum computers, it is anticipated that cryptographic attacks using them will make it insecure to use existing public key algorithms such as RSA and ECC. Currently, a lot of researches are underway to replace them by devising PQC (Post Quantum Cryptography) schemes. In this paper, we propose a performance enhancement method for Lizard implementation which is one of NIST PQC standardization submission. The proposed method is able to improve the performance by 7 ~ 25% for its algorithms compared to the implementation in the submission through the techniques of various implementation aspects. This study hopes that Lizard will become more competitive as a candidate for PQC standardization.

• 한국IT서비스학회지
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• 제7권3호
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• pp.97-114
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• 2008

Many companies have implemented ERP systems to enhance their process competitiveness. Since most ERP systems down to date are implemented and managed on each separated business-unit or company level, such systems run short of the consideration about global business processes and global system managements. In order to integrate a successful global ERP, it is essential to apply the well-systematic implementation methodology which considers global standardization and global IT requirements. It is, however, the actual circumstance that such well-structured methodologies for global ERP implementation are hardly shown not only from domestic site but from foreign one. This paper indicates the global ERP implementation guideline with integrated approach including; the standard process design for efficient execution of global business; the ERP implementation method considering global IT requirements; and, the management method for global system operation. GSI ERP methodology is composed of 3 Phase：Global Strategy Planning, Global Template Construction and Global Roll-Out. Phase1; Global Strategy Planning contains Environment Analysis, GSI direction and Implementation Plan. Phase2; Global Template Construction contains Business blueprint, GSI operation design and Global template implementation. Phase3; Global Roll-out contains local business analysis, local ERP implementation and Global ERP Operation.

• Journal of information and communication convergence engineering
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• 제14권3호
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• pp.177-183
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• 2016

A lot of Internet of Things devices has resource-restricted environment, so it is difficult to implement the existing block ciphers such as AES, PRESENT. By this reason, there are lightweight block ciphers, such as SIMON, SPECK, and Simeck, support various block/key sizes. These lightweight block ciphers can support the security on the IoT devices. In this paper, we propose efficient implementation methods and performance results for the Simeck family block cipher proposed in CHES 2015 on an 8-bit ATmega128-based STK600 board. The proposed methods can be adapted in the 8-bit microprocessor environment such as Arduino series which are one of famous devices for IoT application. The optimized on-the-fly (OTF) speed is on average 14.42 times faster and the optimized OTF memory is 1.53 times smaller than those obtained in the previous research. The speed-optimized encryption and the memory-optimized encryption are on average 12.98 times faster and 1.3 times smaller than those obtained in the previous studies, respectively.

• 한국인터넷방송통신학회논문지
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• 제12권5호
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• pp.219-227
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• 2012

본 논문에서는 색 정보 분석기법을 이용한 효율적인 CCTV 영상 보안 시스템의 설계 및 구현에 관하여 기술한다. 기존의 방법에서는 주로 압축 알고리듬과 암호화 기법을 이용하여 데이터 처리 비용을 절감하였다. 그러나 본 논문에는 데이터의 절대량을 감소시키기 위하여 영상 데이터의 중복 요소 제거를 위한 색 정보 분석 기법을 제안한다. 또한 SSL/VPN 터널링 기법을 이용하여 CCTV 영상 보안 시스템의 성능을 향상 시키는 방법을 제안한다. 본 논문에서 제안하는 방법을 사용하면 대용량 정보의 효율적인 처리 및 보안 문제를 해결할 수 있으며, 구현 결과를 통하여 처리 대상이 되는 영상 데이터가 대폭 감소됨을 확인하였다.

• 공학교육연구
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• 제4권1호
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• pp.20-25
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• 2001

본 논문에서는 제작비용이 저렴하면서도 학습자와 교수자간의 상호작용을 극대화하여 웹 상에서 효과적인 학습이 일어날 수 있도록 하는 가상전기전자실험실을 자바 애플릿을 이용하여 구현하는 방안을 제안하였다. 제안된 가상실험실은 크게 실험원리학습실, 모의실험학습실, 자바가상실험학습실 및 가상실험실 관리 및 평가시스템으로 구성되어 있어 학습자로 하여금 흥미를 유발하여 전기전자실험을 간단한 마우스 조작만으로 수행할 수 있도록 하였다. 본 논문에서 효율적인 전기전자 가상실험실 구현을 위해 제시된 방안은 수많은 방법중의 하나로써 향후 많은 수정과 보완이 이루어지리라 기대하며 제안된 방안은 공학분야뿐만 아니라 자연과학분야에까지 확대적용이 가능하여 기존의 교육시스템에서 발생되는 문제를 상당부분 보완할 수 있을 것으로 생각된다.

• Journal of Information Processing Systems
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• 제8권1호
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• pp.159-174
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• 2012

This paper presents a study on a high-performance design for a block cipher algorithm implemented on modern many-core graphics processing units (GPUs). The recent emergence of VLSI technology makes it feasible to fabricate multiple processing cores on a single chip and enables general-purpose computation on a GPU (GPGPU). The GPU strategy offers significant performance improvements for all-purpose computation and can be used to support a broad variety of applications, including cryptography. We have proposed an efficient implementation of the encryption/decryption operations of a block cipher algorithm, SEED, on off-the-shelf NVIDIA many-core graphics processors. In a thorough experiment, we achieved high performance that is capable of supporting a high network speed of up to 9.5 Gbps on an NVIDIA GTX285 system (which has 240 processing cores). Our implementation provides up to 4.75 times higher performance in terms of encoding and decoding throughput as compared to the Intel 8-core system.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.37-44
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• 2010

New features of motion compensation, such as variable block size and multiple reference frames are introduced in H.264/AVC. However, these new features induce significant implementation complexity increases. In this paper, an efficient architecture for spiral-type motion estimation is proposed. First, we propose a hardware-friendly spiral search order. Then, an efficient processing element (PE) architecture for ME is proposed to achieve the proposed search order. The improved PE enables one-pixel-move of the reference pixel data to top, bottom, right, and left by four ports for input and output. Moreover, the parallel calculation architecture to calculate all block size with the SAD of 4x4 is introduced in the proposed architecture. As the result of hardware implementation, the hardware cost is about 145k gates. Maximum clock frequency is 134 MHz in the case of FPGA (Xilinx Vertex5) implementation.