• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.254-256
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• 2019

소수체 GF(p)와 이진체 $GF(2^m)$ 상의 다중 타원곡선을 지원하는 듀얼 필드 ECC (DF-ECC) 프로세서를 설계하였다. DF-ECC 프로세서의 저면적 설와 다양한 타원곡선의 지원이 가능하도록 워드 기반 몽고메리 곱셈 알고리듬을 적용한 유한체 곱셈기를 저면적으로 설계하였으며, 페르마의 소정리(Fermat's little theorem)를 유한체 곱셈기에 적용하여 유한체 나눗셈을 구현하였다. 설계된 DF-ECC 프로세서는 스칼라 곱셈과 점 연산, 그리고 모듈러 연산 기능을 가져 다양한 공개키 암호 프로토콜에 응용이 가능하며, 유한체 및 모듈러 연산에 적용되는 파라미터를 내부 연산으로 생성하여 다양한 표준의 타원곡선을 지원하도록 하였다. 설계된 DF-ECC는 FPGA 구현을 하드웨어 동작을 검증하였으며, 0.18-um CMOS 셀 라이브러리로 합성한 결과 22,262 GEs (gate equivalences)와 11 kbit RAM으로 구현되었으며, 최대 100 MHz의 동작 주파수를 갖는다. 설계된 DF-ECC 프로세서의 연산성능은 B-163 Koblitz 타원곡선의 경우 스칼라 곱셈 연산에 885,044 클록 사이클이 소요되며, B-571 슈도랜덤 타원곡선의 스칼라 곱셈에는 25,040,625 사이클이 소요된다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.5
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• pp.781-793
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• 2020

In this paper, we propose a new RLWE-based scheme named μ-Hope that exploits Error Correcting Code(ECC) on NewHope. The previous parameters of NewHope uses 12289 as a prime modulus, and the size of the public key, private key, and ciphertext is 928-byte, 1888-byte, and 1120-byte respectively, which can be said to be larger than other RLWE based algorithms. In this paper, we propose μ-Hope, which changes modulus 12289 to 769 to reduce the size of the public key, private key, and ciphertext. Also, we adopts XE1 as an Error Correcting Code(ECC) to solve the increased decryption failure rate caused by using a small prime modulus. As a result, the size of the public key, private key, and ciphertext decreased by 38%, 37%, and 37% respectively. As the computational efficiency caused by using a small prime modulus exceeds the performance degradation by exploiting ECC, this result in 25% performance improvement for a single key exchange.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.533-544
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• 2021

Using Shor algorithm, factoring and discrete logarithm problem can be solved effectively. The public key cryptography, such as RSA and ECC, based on factoring and discrete logarithm problem can be broken in polynomial time using Shor algorithm. NIST has been conducting a PQC(Post Quantum Cryptography) standardization process to select quantum-resistant public key cryptography. The multivariate quadratic based signature scheme, which is one of the PQC candidates, is suitable for IoT devices with limited resources due to its short signature and fast sign and verify process. We analyzes classic attacks and quantum attacks for Rainbow which is the only multivatiate quadratic based signature scheme to be finalized up to the round 3. Also we compute the attack complexity for the round 3 Rainbow parameters, and analyzes the security level of Rainbow, one of the PQC standardization candidates.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.188-190
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• 2017

투영(projective) 좌표계를 이용한 스칼라 곱셈(scalar multiplication) 연산을 지원하는 224-비트 타원곡선 암호(Elliptic Curve Cryptography; ECC) 프로세서의 설계에 대해 기술한다. 소수체 GF(p)상의 덧셈, 뺄셈, 곱셈 등의 유한체 연산을 지원하며, 연산량과 하드웨어 자원소모가 큰 나눗셈 연산을 제거함으로써 하드웨어 복잡도를 감소시켰다. 수정된 Montgomery ladder 알고리듬을 이용하여 스칼라 곱셈 연산을 제어하였으며, 단순 전력분석에 보다 안전하다. 스칼라 곱셈 연산은 최대 2,615,201 클록 사이클이 소요된다. 설계된 ECC-P224 프로세서는 Xilinx ISim을 이용한 기능검증을 하였다. Xilinx Virtex5 FPGA 디바이스 합성결과 7,078 슬라이스로 구현되었으며, 최대 79 MHz에서 동작하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.247-249
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• 2017

NIST에서 표준으로 정의된 P-192, P-224, P-256, P-384 타원곡선 상의 스칼라 곱셈(scalar multiplication) 연산을 지원하는 Scalable 타원곡선 암호(Elliptic Curve Cryptography; ECC) 프로세서의 설계에 대해 기술한다. 투영(projective) 좌표계를 이용하여 하드웨어 자원 소모가 큰 나눗셈 연산을 제거하였으며, GF(p) 상의 덧셈, 뺄셈, 곱셈 등의 유한체 연산을 지원한다. 워드 기반 몽고메리 곱셈기를 이용하여 다양한 크기의 필드(field)에서 고정된 하드웨어 자원을 통하여 곱셈 연산을 수행하도록 하였으며, 필드의 크기에 따라 연산 사이클이 증가하거나 감소한다. 설계된 Scalable ECC 프로세서는 Verilog HDL로 모델링 되었으며, Modelsim을 이용한 기능검증을 하였다. Xilinx Virtex5 FPGA 디바이스 합성결과 5,376-비트 RAM과 970 슬라이스로 구현되었으며, 최대 55 MHz의 동작 주파수를 갖는다.

• Convergence Security Journal
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• v.6 no.2
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• pp.43-51
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• 2006

The existing electronic transaction protocol uses a cryptography algorithm that is not suitable for mobile environment because of limited memory and process ability. In this paper, we propose an efficient transaction protocol suitable for mobile embedded system. The proposed protocol reduces computation and process time by using ID-based cryptography algorithm and ECC (elliptic curve cryptosystem). It uses vendor authentication only in the first transaction, and from the second transaction, it requires transaction after authentication with session created by applying ECC technique. Therefore, the creation number of authentication for the vendor can be reduced from n to one. And it reduces process time because it provides the same security with 160 bits as with 1024 bits of RSA.

• ETRI Journal
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• v.25 no.5
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• pp.315-320
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• 2003

Elliptic curve cryptography (ECC) offers the highest security per bit among the known public key cryptosystems. The operation of ECC is based on the arithmetic of the finite field. This paper presents the design of a 193-bit finite field multiplier and an inversion unit based on a normal basis representation in which the inversion and the square operation units are easy to implement. This scalable multiplier can be constructed in a variable structure depending on the performance area trade-off. We implement it using Verilog HDL and a 0.35 ${\mu}m$ CMOS cell library and verify the operation by simulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.762-764
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• 2016

The ECQV(Elliptic Curve Qu-Vanstone) is a implicit certificate scheme based on ECC(Elliptic Curve Cryptography). Implicit certificates are smaller and faster than a traditional explicit certificate. Therefore, it can be used in a memory or bandwidth constraint communication environments. Also, the butterfly key expansion algorithm is a method to issue many certificates by using only one public key. In this study, by applying the butterfly key expansion algorithm to ECQV, we suggest a new useful issuing certificate method that can be used in vehicular communication environments.

• ETRI Journal
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• v.33 no.5
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• pp.791-801
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• 2011

Security in wireless sensor networks (WSNs) is an upcoming research field which is quite different from traditional network security mechanisms. Many applications are dependent on the secure operation of a WSN, and have serious effects if the network is disrupted. Therefore, it is necessary to protect communication between sensor nodes. Key management plays an essential role in achieving security in WSNs. To achieve security, various key predistribution schemes have been proposed in the literature. A secure key management technique in WSN is a real challenging task. In this paper, a novel approach to the above problem by making use of elliptic curve cryptography (ECC) is presented. In the proposed scheme, a seed key, which is a distinct point in an elliptic curve, is assigned to each sensor node prior to its deployment. The private key ring for each sensor node is generated using the point doubling mathematical operation over the seed key. When two nodes share a common private key, then a link is established between these two nodes. By suitably choosing the value of the prime field and key ring size, the probability of two nodes sharing the same private key could be increased. The performance is evaluated in terms of connectivity and resilience against node capture. The results show that the performance is better for the proposed scheme with ECC compared to the other basic schemes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.15-26
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• 2005

In this paper, we propose an efficient $GF(2^m)$ multi-segment multiplier architecture and study its application to elliptic curve cryptography processors. The multi-segment based ECC datapath has a very small combinational multiplier to compute partial products, most of its internal data buses are word-sized, and it has only a single m bit multiplexer and a single m bit register. Hence, the resource requirements of the proposed ECC datapath can be minimized as the segment number increases and word-size is decreased. Hence, as compared to the ECC processor based on digit-serial multiplication, the proposed ECC datapath is more efficient in resource usage. The resource requirement of ECC Processor implementation depends not only on the number of basic hardware components but also on the complexity of interconnection among them. To show the realistic area efficiency of proposed ECC processors, we implemented both the ECC processors based on the proposed multi-segment multiplication and digit serial multiplication and compared their FPGA resource usages. The experimental results show that the Proposed multi-segment multiplication method allows to implement ECC coprocessors, requiring about half of FPGA resources as compared to digit serial multiplication.