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Low-Cost Elliptic Curve Cryptography Processor Based On Multi-Segment Multiplication  

LEE Dong-Ho (School of Electrical Engineering and Computer Science, Kyungpook National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.8, 2005 , pp. 15-26 More about this Journal
Abstract
In this paper, we propose an efficient $GF(2^m)$ multi-segment multiplier architecture and study its application to elliptic curve cryptography processors. The multi-segment based ECC datapath has a very small combinational multiplier to compute partial products, most of its internal data buses are word-sized, and it has only a single m bit multiplexer and a single m bit register. Hence, the resource requirements of the proposed ECC datapath can be minimized as the segment number increases and word-size is decreased. Hence, as compared to the ECC processor based on digit-serial multiplication, the proposed ECC datapath is more efficient in resource usage. The resource requirement of ECC Processor implementation depends not only on the number of basic hardware components but also on the complexity of interconnection among them. To show the realistic area efficiency of proposed ECC processors, we implemented both the ECC processors based on the proposed multi-segment multiplication and digit serial multiplication and compared their FPGA resource usages. The experimental results show that the Proposed multi-segment multiplication method allows to implement ECC coprocessors, requiring about half of FPGA resources as compared to digit serial multiplication.
Keywords
ECC; Finite Field Multiplication; Computation Architecture;
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