• Journal of Fisheries and Marine Sciences Education
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• v.29 no.2
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• pp.513-525
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• 2017

In the estimation of the exploitable carrying capacity (ECC) in the Korean water of the East China Sea, two approaches, which are the ecosystem modeling method (EMM) and the holistic production method (HPM), were applied. The EMM is accomplished by Ecopath with Ecosim model using a number of ecological data and fishery catch for each species group, which was categorized by a self-organizing mapping (SOM) based on eight biological characteristics of species. In this method, the converged value during the Ecosim simulation by setting the instantaneous rate of fishing mortality (F) as zero was estimated as the ECC of each group. The HPM is to use surplus production models for estimateing ECC. The ECC estimates were 4.6 and 5.1 million mt (mmt) from EMM and HPM, respectiverly. The estimate from the EMM has a considerable uncertainty due to the lack of confidence in input ecological parameters, especially production/biomass ratio (P/B) and consumption/biomass ratio (Q/B). However, ECC from the HPM was estimated on the basis of relatively fewer assumptions and long time-series fishery data as input, so the estimate from the HPM is regarded as more reasonable estimate of ECC, although the ECC estimate could be considerd as a preliminary one. The quality of input data should be improved for the future study of the ECC to obtain more reliable estimate.

• Molecules and Cells
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• v.40 no.5
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• pp.363-370
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• 2017

Extrahepatic cholangiocarcinoma (ECC), a malignant tumor of biliary origin, has a poor prognosis with limited treatment options. The KRAS oncogene is the most commonly mutated gene in ECC and one of the factors that predicts a poor prognosis and low survival rate. L1 cell adhesion molecule (L1CAM) is expressed in ECC cells and acts as an independent poor prognostic factor in predicting patient survival. In this study we investigate the functional significance of L1CAM in ECC cells with activating KRAS mutation. We selected an ECC cell line, EGI-1, with activating KRAS mutation, and then confirmed its expression of L1CAM by RT-PCR, western blot analysis, and flow cytometry. The suppression of L1CAM expression (using a specific lentivirus-delivered shRNA) significantly decreased the migratory and invasive properties of EGI-1 cells, without altering their proliferation or survival. Analyses of signaling effectors in L1CAM-depleted and control EGI-1 cells indicated that L1CAM suppression decreased the levels of both phosphorylated MKK4 and total MKK4, together with c-Jun N-terminal kinase (JNK) phosphorylation. Further, exposure to a JNK inhibitor (SP600125) decreased migration and invasion of EGI-1 cells. These results suggest that L1CAM promotes cellular migration and invasion via the induction of MKK4 expression, leading to JNK activation. Our study is the first to demonstrate a functional role for L1CAM in ECC carrying the activating KRAS mutation. Given that KRAS is the most commonly mutated oncogene in ECC, L1CAM may serve as an attractive therapeutic target for ECC cells with activating KRAS mutation.

• Journal of IKEEE
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• v.23 no.1
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• pp.58-67
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• 2019

A design of an elliptic curve cryptography (ECC) processor that supports both pseudo-random curves and Koblitz curves over $GF(2^m)$ defined by the NIST standard is described in this paper. A finite field arithmetic circuit based on a word-based Montgomery multiplier was designed to support five key lengths using a datapath of fixed size, as well as to achieve a lightweight hardware implementation. In addition, Lopez-Dahab's coordinate system was adopted to remove the finite field division operation. The ECC processor was implemented in the FPGA verification platform and the hardware operation was verified by Elliptic Curve Diffie-Hellman (ECDH) key exchange protocol operation. The ECC processor that was synthesized with a 180-nm CMOS cell library occupied 10,674 gate equivalents (GEs) and a dual-port RAM of 9 kbits, and the maximum clock frequency was estimated at 154 MHz. The scalar multiplication operation over the 223-bit pseudo-random elliptic curve takes 1,112,221 clock cycles and has a throughput of 32.3 kbps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.7
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• pp.956-962
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• 2020

Recently, as the size of data used in an embedded system increases, the need for an ECC decoding operation to robustly receive a massive data is emphasized. In this paper, we propose a method to accelerate the execution of computations that derive syndrome vectors when ECC decoding is performed using Hamming code in an embedded system with a built-in GPU. The proposed acceleration method uses the matrix-vector multiplication of the decoding operation using the CSR format, one of the data structures representing sparse matrix, and is performed in parallel in the CUDA kernel of the GPU. We evaluated the proposed method using a target embedded board with a GPU, and the result shows that the execution time is reduced when ECC decoding operation accelerated based on the GPU than used only CPU.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.4
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• pp.548-555
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• 2022

This paper describes the hardware implementation of elliptic curve cryptography (ECC) used as a core operation in elliptic curve digital signature algorithm (ECDSA). The ECC processor supports eight operation modes (four point operations, four modular operations) on the NIST P-521 curve. In order to minimize computation complexity required for point scalar multiplication (PSM), the radix-4 Booth encoding scheme and modified Jacobian coordinate system were adopted, which was based on the complexity analysis for five PSM algorithms and four different coordinate systems. Modular multiplication was implemented using a modified 3-Way Toom-Cook multiplication and a modified fast reduction algorithm. The ECC processor was implemented on xczu7ev FPGA device to verify hardware operation. Hardware resources of 101,921 LUTs, 18,357 flip-flops and 101 DSP blocks were used, and it was evaluated that about 370 PSM operations per second were achieved at a maximum operation clock frequency of 45 MHz.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.140-143
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• 2000

소형화와 안전성에서 보다 더 진보된 ECC( Elliptic Curve Cryptography) 암호화 알고리즘의 하드웨어적 구현을 제안한다. Basis는 VLSI 구현에 적합한 standard basis이며 m=193 ECC 승산기 회로를 설계하였다. Bit-Parallel 구조를 바탕으로 Digit-Serial/Bit-Parallel 방법으로 구현하였다. 제안된 구조는 VHDL 및 SYNOPSYS로 검증되었다.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10c
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• pp.673-675
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• 2002

기존의 SET은 전자서명(digital signature), 데이터 암호화(data encryption), 전자 봉투(digital envelope)로 구성되어 있으며, RSA, SHA, DES를 사용하여 프로토콜을 구현하는데, 본 논문은 ECC의 공개키와 개인키를 이용하여 암호 강도가 강화된 대칭키 알고리즘을 제안하고 SET의 전자 봉투를 생략한 SSET를 제안하고 있다.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2009.05c
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• pp.75-78
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• 2009

It was investigated fire resistance properties and mechanical properties of high strength concrete column using ECC(Engineered Cementitious Composites) permanent form by KS F 2257 Methods of fire resistance test for elements of building construction and compression test for application of precast concrete column method of high rise building in this study. As a test result, it was appeared that ECC permanent form is available as fire resistance method of high strength concrete and new precast concrete construction method for facilitating construction of high rise building.

• Proceedings of the Korean Information Science Society Conference
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• 2005.11a
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• pp.136-138
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• 2005

최근에 Aydos는 ECC를 기반으로 한 무선 환경에 적합한 인증된 키 합의 프로토콜을 제안하였다. 그러나 그가 제안한 프로토콜은 Sun과 Mangipudi에 의해 각각 몇 가지 암호학적 공격에 취약함을 보였으며, Mangipudi는 더 나아가 그러한 공격에 안전한 개선된 프로토콜을 제안하였다. 하지만 Mangipudi가 제안한 프로토콜은 Sun이 지적한 공격에 대해서 여전히 안전하지 못하다. 본 논문에서는 이러한 모든 공격들에 대해 안전하면서 연산에 있어서 더욱 효율적인 ECC 기반의 인증된 키 합의 프로토콜을 제안한다. 제안하는 프로토콜은 역시 ECC를 기반으로 하고 있으며, 앞서 언급한 Aydos 프로토콜과 Mangipudi 프로토콜 보다 더욱 안전하고 효율적이다.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.651-654
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• 2005

In this paper, we designed ECC(Elliptic Curve Cryptographic) Processor with Bus-splitting mothod for embedded SoC. ECC SIP is designed by VHDL RTL modeling, and implemented reusably through the procedure of logic synthesis, simulation and FPGA verification. To communicate with ARM9 core and SIP, we designed SIP bus functional model according to AMBA AHB specification. The design of ECC Processor for platform-based SoC is implemented using the design kit which is composed of many devices such as ARM9 RISC core, memory, UART, interrupt controller, FPGA and so on. We performed software design on the ARM9 core for SIP and peripherals control, memory address mapping and so on.