• 제목/요약/키워드: Dynamic Random Access Memory

검색결과 79건 처리시간 0.025초

Fully Room Temperature fabricated $TaO_x$ Thin Film for Non-volatile Memory

  • Choi, Sun-Young;Kim, Sang-Sig;Lee, Jeon-Kook
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2011년도 춘계학술발표대회
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    • pp.28.2-28.2
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    • 2011
  • Resistance random access memory (ReRAM) is a promising candidate for next-generation nonvolatile memory because of its advantageous qualities such as simple structure, superior scalability, fast switching speed, low-power operation, and nondestructive readout. We investigated the resistive switching behavior of tantalum oxide that has been widely used in dynamic random access memories (DRAM) in the present semiconductor industry. As a result, it possesses full compatibility with the entrenched complementary metal-oxide-semiconductor processes. According to previous studies, TiN is a good oxygen reservoir. The TiN top electrode possesses the specific properties to control and modulate oxygen ion reproductively, which results in excellent resistive switching characteristics. This study presents fully room temperature fabricated the TiN/$TaO_x$/Pt devices and their electrical properties for nonvolatile memory application. In addition, we investigated the TiN electrode dependence of the electrical properties in $TaO_x$ memory devices. The devices exhibited a low operation voltage of 0.6 V as well as good endurance up to $10^5$ cycles. Moreover, the benefits of high devise yield multilevel storage possibility make them promising in the next generation nonvolatile memory applications.

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(Bi,La)$Ti_3O_12/$ 강유전체 물질을 갖는 전계효과형 트랜지스터의 제작과 특성연구 (Preparation and Properties of Field Effect Transistor with (Bi,La)$Ti_3O_12/$ Ferroelectric Materials)

  • 서강모;조중연;장호정
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.180-180
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    • 2003
  • FRAM (Ferroelectric Random Access Memory)은 DRAM(Dynamic Random Access Memory)in 커패시터 재료을 상유전체 물질에서 강유전체 물질로 대체하여 전원 공급이 차단되어도 정보를 기억할 수 있고, 데이터의 고속처리가 가능하고 저소비전력과 집적화가 뛰어난 차세대 메모리 소자이다. 본 연구에서는 n-Well/P-Si(100) 기판위에 $Y_2$O$_3$ 박막을 중간층 (buffer layer)으로 사용하여 (Bi,La) Ti$_3$O$_{12}$ (BLT) 강유전체 박막을 졸-겔 방법으로 형성하여 MFM(I)S(Metal Ferroelectric Metal (Insulation) Silicon) 구조의 커패시터 및 전계효과형 트랜지스터(Field Effect Transistor) 소자를 제작하였다. 제작된 소자에 대해 형상학적, 전기적 특성을 조사, 분석하였다.

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Effects of Etch Parameters on Etching of CoFeB Thin Films in $CH_4/O_2/Ar$ Mix

  • Lee, Tea-Young;Lee, Il-Hoon;Chung, Chee-Won
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.390-390
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    • 2012
  • Information technology industries has grown rapidly and demanded alternative memories for the next generation. The most popular random access memory, dynamic random-access memory (DRAM), has many advantages as a memory, but it could not meet the demands from the current of developed industries. One of highlighted alternative memories is magnetic random-access memory (MRAM). It has many advantages like low power consumption, huge storage, high operating speed, and non-volatile properties. MRAM consists of magnetic-tunnel-junction (MTJ) stack which is a key part of it and has various magnetic thin films like CoFeB, FePt, IrMn, and so on. Each magnetic thin film is difficult to be etched without any damages and react with chemical species in plasma. For improving the etching process, a high density plasma etching process was employed. Moreover, the previous etching gases were highly corrosive and dangerous. Therefore, the safety etching gases are needed to be developed. In this research, the etch characteristics of CoFeB magnetic thin films were studied by using an inductively coupled plasma reactive ion etching in $CH_4/O_2/Ar$ gas mixes. TiN thin films were used as a hardmask on CoFeB thin films. The concentrations of $O_2$ in $CH_4/O_2/Ar$ gas mix were varied, and then, the rf coil power, gas pressure, and dc-bias voltage. The etch rates and the selectivity were obtained by a surface profiler and the etch profiles were observed by a field emission scanning electron microscopy. X-ray photoelectron spectroscopy was employed to reveal the etch mechanism.

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WARP: Memory Subsystem Effective for Wrapping Bursts of a Cache

  • Jang, Wooyoung
    • ETRI Journal
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    • 제39권3호
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    • pp.428-436
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    • 2017
  • State-of-the-art processors require increasingly complicated memory services for high performance and low power consumption. In particular, they request transfers within a burst in a wrap-around order to minimize the miss penalty of a cache. However, synchronous dynamic random access memories (SDRAMs) do not always generate transfers in the wrap-round order required by the processors. Thus, a memory subsystem rearranges the SDRAM transfers in the wrap-around order, but the rearrangement process may increase memory latency and waste the bandwidth of on-chip interconnects. In this paper, we present a memory subsystem that is effective for the wrapping bursts of a cache. The proposed memory subsystem makes SDRAMs generate transfers in an intermediate order, where the transfers are rearranged in the wrap-around order with minimal penalties. Then, the transfers are delivered with priority, depending on the program locality in space. Experimental results showed that the proposed memory subsystem minimizes the memory performance loss resulting from wrapping bursts and, thus, improves program execution time.

PRAM 기반의 조인 알고리즘 성능 비교 연구 (A Comparative Study of PRAM-based Join Algorithms)

  • 최용성;온병원;최규상;이인규
    • 정보과학회 논문지
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    • 제42권3호
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    • pp.379-389
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    • 2015
  • Phase Change Memory (PCM 또는 PRAM), Magneto Resistive RAM (MRAM)과 같은 차세대 비휘발성 메모리가 등장하면서, Dynamic Random-Access Memory (DRAM)을 PRAM으로 대체하는 연구가 활발히 진행되고 있다. 본 논문에서는 PRAM을 메인 메모리로 사용하는 시스템에서 지금까지 널리 사용되고 있는 기존의 조인 알고리즘(블록 네스티드 조인, 소트-머지 조인, 그레이스 해시 조인, 하이브리드 해시 조인)들을 사용했을 때 발생하는 내구성과 성능 문제를 비교, 분석한다. 본 연구의 실험결과에 의하면 기존의 조인 알고리즘들을 PRAM에 맞게 재설계해야 하는 필요성이 제기되었다. 특히, 본 연구는 조인 알고리즘들을 PRAM에 적용했을 때 발생하는 이슈들을 과학적으로 규명한 첫 시도이다. 그리고 기존의 조인 알고리즘들을 PRAM에 적용했을 때 발생하는 내구성과 성능을 비교하기 위한 PRAM 기반의 시스템을 모델링하고 시뮬레이터를 구현한 것에 연구의 의의를 둘 수 있다.

인텔 비휘발성 메모리 기술 동향 (Trend of Intel Nonvolatile Memory Technology)

  • 이용섭;우영주;정성인
    • 전자통신동향분석
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    • 제35권3호
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    • pp.55-65
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    • 2020
  • With the development of nonvolatile memory technology, Intel has released the Optane datacenter persistent memory module (DCPMM) that can be deployed in the dual in-line memory module. The results of research and experiments on Optane DCPMMs are significantly different from the anticipated results in previous studies through emulation. The DCPMM can be used in two different modes, namely, memory mode (similar to volatile DRAM: Dynamic Random Access Memory) and app direct mode (similar to file storage). It has buffers in 256-byte granularity; this is four times the CPU (Central Processing Unit) cache line (i.e., 64 bytes). However, these properties are not easy to use correctly, and the incorrect use of these properties may result in performance degradation. Optane has the same characteristics of DRAM and storage devices. To take advantage of the performance characteristics of this device, operating systems and applications require new approaches. However, this change in computing environments will require a significant number of researches in the future.

Bit Flip Reduction Schemes to Improve PCM Lifetime: A Survey

  • Han, Miseon;Han, Youngsun
    • IEIE Transactions on Smart Processing and Computing
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    • 제5권5호
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    • pp.337-345
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    • 2016
  • Recently, as the number of cores in computer systems has increased, the need for larger memory capacity has also increased. Unfortunately, dynamic random access memory (DRAM), popularly used as main memory for decades, now faces a scalability limitation. Phase change memory (PCM) is considered one of the strong alternatives to DRAM due to its advantages, such as high scalability, non-volatility, low idle power, and so on. However, since PCM suffers from short write endurance, direct use of PCM in main memory incurs a significant problem due to its short lifetime. To solve the lifetime limitation, many studies have focused on reducing the number of bit flips per write request. In this paper, we describe the PCM operating principles in detail and explore various bit flip reduction schemes. Also, we compare their performance in terms of bit reduction rate and lifetime improvement.

Performance Evaluation of SSD-Index Maintenance Schemes in IR Applications

  • Jin, Du-Seok;Jung, Hoe-Kyung
    • Journal of information and communication convergence engineering
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    • 제8권4호
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    • pp.377-382
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    • 2010
  • With the advent of flash memory based new storage device (SSD), there is considerable interest within the computer industry in using flash memory based storage devices for many different types of application. The dynamic index structure of large text collections has been a primary issue in the Information Retrieval Applications among them. Previous studies have proven the three approaches to be effective: In- Place, merge-based index structure and a combination of both. The above-mentioned strategies have been researched with the traditional storage device (HDD) which has a constraint on how keep the contiguity of dynamic data. However, in case of the new storage device, we don' have any constraint contiguity problems due to its low access latency time. But, although the new storage device has superiority such as low access latency and improved I/O throughput speeds, it is still not well suited for traditional dynamic index structures because of the poor random write throughput in practical systems. Therefore, using the experimental performance evaluation of various index maintenance schemes on the new storage device, we propose an efficient index structure for new storage device that improves significantly the index maintenance speed without degradation of query performance.

Etch Characteristics of MgO Thin Films in Cl2/Ar, CH3OH/Ar, and CH4/Ar Plasmas

  • Lee, Il Hoon;Lee, Tea Young;Chung, Chee Won
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.387-387
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    • 2013
  • Currently, the flash memory and the dynamic random access memory (DRAM) have been used in a variety of applications. However, the downsizing of devices and the increasing density of recording medias are now in progress. So there are many demands for development of new semiconductor memory for next generation. Magnetic random access memory (MRAM) is one of the prospective semiconductor memories with excellent features including non-volatility, fast access time, unlimited read/write endurance, low operating voltage, and high storage density. MRAM is composed of magnetic tunnel junction (MTJ) stack and complementary metal-oxide semiconductor (CMOS). The MTJ stack consists of various magnetic materials, metals, and a tunneling barrier layer. Recently, MgO thin films have attracted a great attention as the prominent candidates for a tunneling barrier layer in the MTJ stack instead of the conventional Al2O3 films, because it has low Gibbs energy, low dielectric constant and high tunneling magnetoresistance value. For the successful etching of high density MRAM, the etching characteristics of MgO thin films as a tunneling barrier layer should be developed. In this study, the etch characteristics of MgO thin films have been investigated in various gas mixes using an inductively coupled plasma reactive ion etching (ICPRIE). The Cl2/Ar, CH3OH/Ar, and CH4/Ar gas mix were employed to find an optimized etching gas for MgO thin film etching. TiN thin films were employed as a hard mask to increase the etch selectivity. The etch rates were obtained using surface profilometer and etch profiles were observed by using the field emission scanning electron microscopy (FESEM).

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졸겔법에 의해 제작된 강유전체 BST막의 기계.화학적인 연마 특성 (Chemical Mechanical Polishing (CMP) Characteristics of BST Ferroelectric Film by Sol-Gel Method)

  • 서용진;박성우
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권3호
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    • pp.128-132
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    • 2004
  • The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.