• Journal of the Korean Institute of Telematics and Electronics B
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• 제32B권6호
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• pp.840-848
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• 1995

A new tri-aural ultrasonic sensor system is suggested to build more accurate world maps for mobile robots with less scanning. In ordinary single sensor systems, the inherent beam-width of sonar transmitter causes ambiguity in sensing direction. Dual sensors may be used to discriminate plane and corner with several scans. However, the proposed method uses triple sensors, and achieves more accuracy with less scanning.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제21권3호
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• pp.499-508
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• 2017

A new digital pre-distortion technique to linearize power amplifier (PA) is proposed for concurrent dual-band transmitters. In the conventional dual-band DPD techniques, two independent dual-feedback paths are required to compensate nonlinear cross-products between different bands as well as the nonlinear self-products of each band's own signal. However, it increases hardware complexity and expense. In this paper, we propose a new DPD method requiring only a single feedback path. In this new structure, the proposed technique first estimates the dual-band PA characteristics using the single feedback path. The DPD parameters are then extracted from the estimated PA characteristics. The DPD performance of the proposed method is validated through computer simulation. According to the results, the proposed technique can achieve comparable performance to the conventional two feedback DPD with significantly reduced hardware complexity.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권2호
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• pp.147-155
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• 2002

This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS-Korea and IMT-2000. The transceiver chipset has been implemented in a $0.25\mutextrm{m}$ single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8GHz for PCS-Korea to 2.1GHz for IMT-2000. The LNA has 2.8~3.1dB NF, 14~13dB gain and 5~4dBm IIP3. The down mixer has 15.5~16.0dB NF, 15~13dB power conversion gain and 2~0dBm IIP3. The up mixer has 0~2dB power conversion gain and 6~3dBm OIP3. With a single 3.0V power supply, the LNA, down-mixer, and up-mixer consume 6mA, 30mA, and 25mA, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• 제50권9호
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• pp.68-73
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• 2013

In this paper, we proposed a readout circuit of pulse waveform and rate for a U-health system to monitor health condition. For long-time operation without replacing or charging a battery, either pulse waveform or pulse rate is selected as the output data of the proposed readout circuit according to health condition of a user. The proposed readout circuit consists of a simple digital logic discriminator and a dual-mode ADC which operates in the ADC mode or in the count mode. Firstly, the readout circuit counts pulse rate for 4 seconds in the count mode using the dual-mode ADC. Health condition is examined after the counted pulse rate is accumulated for 1 minute in the discriminator. If the pulse rate is out of the preset normal range, the dual-mode ADC operates in the ADC mode where pulse waveform is converted into 10-bit digital data with the sampling frequency of 1 kHz. These data are stored in a buffer and transmitted by 620 kbps to an external monitor through a RF transmitter. The data transmission period of the RF transmitter depends on the operation mode. It is generally 1 minute in the normal situation or 1 ms in the emergency situation. The proposed readout circuit was designed with $0.11{\mu}m$ process technology. The chip area is $460{\times}800{\mu}m^2$. According to measurement, the power consumption is $161.8{\mu}W$ in the count mode and $507.3{\mu}W$ in the ADC mode with the operating voltage of 1 V.

• Korean Journal of Fisheries and Aquatic Sciences
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• 제51권2호
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• pp.178-186
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• 2018

A chirp-echo data acquisition and processing system was developed for use as a simplified, PC-based chirp echo-sounder with some data processing software modules. The design of the software and hardware system was implemented via a field-programmable gate array (FPGA). Digital signal processing algorithms for driving a single-channel chirp transmitter and dual-channel receivers with independent TVG (time varied gain) amplifier modules were incorporated into the FPGA for better real-time performance. The chirp-echo data acquisition and processing system consisted of a notebook PC, an FPGA board, and chirp sonar transmitter and receiver modules, which were constructed using three chirp transducers operating over a frequency range of 35-210 kHz. The functionality of this PC-based chirp echo-sounder was tested in various field experiments. The results of these experiments showed that the developed PC-based chirp echo-sounder could be used in the acquisition, processing and analysis of broadband acoustic echoes related to fish species identification.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제7권9호
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• pp.2120-2133
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• 2013

In this paper, we address the problem of linear minimum mean-squared error (MMSE) transmitter design for the cognitive radio (CR) multi-user multiple-input single-output (MU-MISO) broadcasting channel (BC), where the cognitive users are subject to not only a sum power constraint, but also a interference power constraint. Evidently, this multi-constraint problem renders it difficult to solve. To overcome this difficulty, we firstly transform it into its equivalent formulation with a single constraint. Then by utilizing BC-MAC duality, the problem of BC transmitter design can be solved by focusing on a dual MAC problem, which is easier to deal with due to its convexity property. Finally we propose an efficient two-level iterative algorithm to search the optimal solution. Our simulation results are provided to corroborate the effectiveness of the proposed algorithm and show that this proposed CR MMSE-based scheme achieves a suboptimal sum-rate performance compared to the optimal DPC-based algorithm with less computational complexity.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제25권4호
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• pp.393-400
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• 2014

In this paper, we have designed the transmitter for earth station terminal operating with military geostationary satellite on Ka-band that is complied with MIL-STD-188-164A. The designed antenna of this terminal is dual-offset gregorian reflector which is consist of corrugated horn and iris polarizer, othermode transducer. This antenna meets radiation pattern and transmit EIRP spectral density requirements in this standard. The designed RF systems of this terminal are consist of Block Up Converter(BUC) converting frequency band from IF to Ka band and SSPA having low-power consumption and compact light-weight using the pHEMT MMIC compound devices. This RF systems applied with VSWR, spurious/harmonic suppression, output flatness and phase noise requirement in this standard.

• Journal of the Institute of Electronics Engineers of Korea TC
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• 제43권1호
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• pp.127-132
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• 2006

This paper presents a dual-mode amplifier which operates as amplifier or frequency multiplier according to the input frequency. It satisfies the 802.11a/b/g frequency band of wireless LAN standard. A conventional dual-band wireless LAN transmitter consists of the separating power amplifiers operating at each frequency band, but the proposed dual-mode amplifier operates as an amplifier for the 802.11b/g signal and as a frequency multiplier for the 802.11a signal according to each LAN bias condition. The amplifier mode shows the gain of 13dB, the PldB of 17dBm and second harmonic suppression of below -37dBc. And the frequency-doubler mode shows the gain of 3.3dB, the output power of 7.3dBm and third harmonic suppression of below -50dBr.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제22권8호
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• pp.52-58
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• 2008

Ths paper describes the Dual-band switch which was proposed new structure that could improved the specification of broadband and designed by the optimized structure through simulation. The Dual-band switch with 2.4[GHz]/5.8[GHz] that can apply to 802.11a/b/g system that is commercialized present was studied to get a new structure with higher power, high isolation. The transmitter of switch was designed to operate a parallel switching element with stack structure of two FET. The receiver designed to have asymmetry structure that insert series FET in addition to basic serial/parallel FET. SPDT(Single Pole Double Throw) Tx/Rx FET switch is a device that can do switching from a port of input to two port of output. The fabricated SPDT switch has the characteristic of insertion loss of a below -3[dB] form DC to 6[GHz] and the isolation of a below -30D[dB](Rx mode).

• Journal of the Institute of Convergence Signal Processing
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• 제15권4호
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• pp.169-175
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• 2014

NG-SDH system is connected with networks throughout optical fibers. Network synchronization controller is a necessary for the data synchronization in each optical transmission system. In this paper, we have design and implementation the network synchronization controller using SOPC(system on a programmable chip) design technic. For this network synchronization controller we use FPGA in Altera. FPGA includes 32bit CPU, DPRAM(dual port ram), digital input/output port, transmitter and receiver framer, phase difference detector. We also confirm that designed network synchronization controller satisfies the ITU-T G.813 timing requirements.