• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1755-1762
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• 2016

In this paper, a small areal dual-output SC(switched capacitor) DC-DC converter with a improved range of an input voltage is presented. The conventional SC DC-DC converter has an advantage of low cost and small chip area. But, it has a narrow input voltage range to convert efficiently. Also, it has a lager chip area and a lower power efficiency from multiple outputs. The proposed SC DC-DC converter improves the power efficiency by using the capacitor array structure which efficiently converts the voltage according to the input voltage. By sharing two switch array, it reduces the number of switches and capacitors from 32 to 25. The proposed SC DC-DC converter was manufactured in a $0.18{\mu}m$ CMOS process. In the simulation, the range of the input voltage is 0.7~ 1.8V, the max. power efficiency is 90%, and the chip area is $0.255mm^2$.

• ETRI Journal
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• v.33 no.6
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• pp.953-956
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• 2011

A novel dual-mode bandpass filter (BPF) using a dual spiral-shaped defected ground waveguide (DGW) resonator is proposed in this letter. The dual-mode characteristic of this filter is achieved by loading a defected T-shaped stub at the midline of the spiral-shaped DGW resonator. Also, non-orthogonal input and output feed-lines are adopted in the filter. Based on the compact DGW structure, a dual-mode BPF with central frequency of 1.5 GHz for the global positioning system is designed, fabricated, and measured. Measured results agree well with the predicted response and verify the proposed methodology.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.76-80
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• 2007

In this paper, the PAE (Power Added Efficiency) and the linearity of the Doherty amplifier has been improved using dual bias control and PBG (Photonic BandGap) structure. The PBG structure has used to implement on output matching circuit and dual bias control has applied to improve the PAE of the Doherty amplifier at a low input level by applying it to a carrier amplifier. The Doherty amplifier using the proposed structure has improved PAE by 8% and 5dBc of IMD3 (3rd Inter-Modulation Distortion) compared with those of the conventional class AB amplifier. In addition to, it has been evident that the designed the structure has showed more than a 30% increase in PAE for flatness over all input power level.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.3-6
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• 2007

In this paper, a hybrid dual band LNA(Low Noise Amplifier) with a tunable matching circuit using varactor is designed for 433MHz and 912MHz RFID reader. The operating frequency is controlled by the bias voltage applied to the varactor. The measured results demonstrate that S21 parameter is 16.01dB and 10.72dB at 433MHz and 912MHz, respectively with a power consumption of 19.36mW. The S11 are -11.88dB and -3.31dB, the S22 are -11.18dB and -15.02dB at the same frequencies. The measured NF (Noise Figure) is 15.96dB and 7.21dB at 433MHz and 912MHz, respectively. The NF had poorer performance than the simulation results. The reason for this discrepancy was thought that the input matching is not performed exactly and a varactor in the input matching circuit degrades the NF characteristics.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2001.11a
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• pp.46-51
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• 2001

To reach high areal density, less track pitch is expected and more servo bandwidth is required. One approach to overcoming the problem is by using dual stage servo system. In this system, a voice coil motor (VCM) is used as the primary stage while a milliactuator is used as the secondary stage. We have suggested new milliactuator based on the shear mode of piezoelectric elements to drive the head suspension assembly. In this paper, we introduce controller design method, PQ method. PQ method reduces the controller design problem for DISO(dual-input/single-output) systems to two standard controller design problems for SISO(single-input/single-output) problems. The first part of PQ method directly address the issue of actuator output contribution, and the second part allows the use of traditional loop shaping to achieve the overall system performance. This paper shows how to employ the PQ method to meet aggressive close-loop performance specifications for a disk drive system with a VCM and piezoelectric milliactuator.

• Journal of electromagnetic engineering and science
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• v.16 no.1
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• pp.19-23
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• 2016

This paper presents a novel design for dual-band bandpass filters. The proposed filters are applicable to the carrier aggregation of the TV white space (TVWS) band and long-term evolution (LTE) band for cognitive radio applications. The lower passband is the TVWS band (470-698 MHz) whose fractional bandwidth is 40 %, while the higher passband is the LTE band (824-894 MHz) with 8 % fractional bandwidth. Since the two passbands are located very close to each other, a transmission zero is inserted to enhance the rejection level between the two passbands. The TVWS band filter is designed using magnetic coupling to obtain a wide bandwidth, and the LTE band filter is designed using dielectric resonators to achieve good insertion loss characteristics. In addition, in the proposed design, a transmission zero is placed with cross-coupling. The proposed dual-band bandpass filter is designed as a two-port filter (one input/one output) as well as a three-port filter (one common input/two outputs). The measured performances show good agreement with the simulated performances.

• Journal of Power Electronics
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• v.15 no.3
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• pp.577-586
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• 2015

The combination of voltage feedforward and feedback control is a conventional approach for correcting the power factor in single-phase ac-dc boost converters. The feedback duty ratio increases significantly with an increase of the line frequency and input inductance. Therefore, the performance of the conventional approach is highly dependent on the bandwidth of the feedback controller. As a result, the input power quality can be significantly exacerbated due to uncompensated duty ratios if the feedback controller is limited. This paper proposes an input impedance and current feedforward control method to reduce the control portion of the feedback controller. The findings in this paper are 1) the theoretical derivation and analysis of variations of line frequency and input inductance on a power factor correction approach, 2) guaranteed consistent performance in a wide range of conditions, and 3) that a low switching frequency can be utilized by the proposed method. A MATLAB/Simulink model and a 1.2kW dual boost converter are built to demonstrate the effectiveness of the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.13-22
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• 2010

This paper proposed the dual-loops multiphase DLL based mixed VCO/VCDL for a high frequency phase noise suppression of the input clock and the multiple frequencies generation with a precise duty cycle. In the proposed architecture, the dual-loops DLL uses the dual input differential buffer based nMOS source-coupled pairs at the input stage of the mixed VCO/VCDL. This can easily convert the input and output phase transfer of the conventional DLL with bypass pass filter characteristic to the input and output phase transfer of PLL with low pass filter characteristic for the high frequency input phase noise suppression. Also, the proposed DLL can correct the duty-cycle error of multiple frequencies by using only the duty-cycle correction circuits and the phase tracking loop without additional correction controlled loop. At the simulation result with $0.18{\mu}m$ CMOS technology, the output phase noise of the proposed DLL is improved under -13dB for 1GHz input clock with 800MHz input phase noise. Also, at 1GHz operating frequency with 40%~60% duty-cycle error, the duty-cycle error of the multiple frequencies is corrected under $50{\pm}1%$ at 2GHz the input clock.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.69-76
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• 2000

A dual-modulus prescaler divides the input signal by one of the moduli according to the control signal. In this paper, a new fast dual-modulus prescaler is proposed. The proposed prescaler has a ratioed-NOR structure different from a conventional ratioed-NAND structure. The proposed one can operate at a higher speed by using parallely connected NMOSs instead of using series-connected ones. HSPICE simulation results using HYUNDAI 0.65(m 2-poly 2-metal CMOS process parameters show that the maximum operating frequency of the proposed dual-modulus prescaler is 2.8㎓ with power consumption of 40.7㎽ at 5V supply voltage at $25^{\circ}C$. The proposed dual-modulus prescaler can be utilized for the frequency-synthesis in cellular radio front-ends.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.2
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• pp.252-257
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• 2011

A compact microstrip dual-band bandpass filter with controllable bandwidth for each passband is proposed. Each passband is independently designed using two different dual-mode resonators. The proposed dual-band bandpass filter has three transmission zeros. Two transmission zeros are generated by each dual-mode resonator. An additional transmission zero is generated by input/output port coupling. The dual-band bandpass filter application is designed for 2.4/5.7 GHz WLAN. Experimental results are presented to validate theory.