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A Multiphase DLL Based on a Mixed VCO/VCDL for Input Phase Noise Suppression and Duty-Cycle Correction of Multiple Frequencies  

Ha, Jong-Chan (School of Electronic Engineering Soongsil Univ.)
Wee, Jae-Kyung (School of Electronic Engineering Soongsil Univ.)
Lee, Pil-Soo (School of Electronic Engineering Soongsil Univ.)
Jung, Won-Young (Dongbu HiTek)
Song, In-Chae (School of Electronic Engineering Soongsil Univ.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.47, no.11, 2010 , pp. 13-22 More about this Journal
Abstract
This paper proposed the dual-loops multiphase DLL based mixed VCO/VCDL for a high frequency phase noise suppression of the input clock and the multiple frequencies generation with a precise duty cycle. In the proposed architecture, the dual-loops DLL uses the dual input differential buffer based nMOS source-coupled pairs at the input stage of the mixed VCO/VCDL. This can easily convert the input and output phase transfer of the conventional DLL with bypass pass filter characteristic to the input and output phase transfer of PLL with low pass filter characteristic for the high frequency input phase noise suppression. Also, the proposed DLL can correct the duty-cycle error of multiple frequencies by using only the duty-cycle correction circuits and the phase tracking loop without additional correction controlled loop. At the simulation result with $0.18{\mu}m$ CMOS technology, the output phase noise of the proposed DLL is improved under -13dB for 1GHz input clock with 800MHz input phase noise. Also, at 1GHz operating frequency with 40%~60% duty-cycle error, the duty-cycle error of the multiple frequencies is corrected under $50{\pm}1%$ at 2GHz the input clock.
Keywords
Delay-locked loop; input phase noise; duty-cycle correction; multiple frequencies;
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