• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.44-50
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• 2002

A novel technique for minimization of simultaneous switching noise is Presented. Dual Layer Power Line (DLPL) structure i:; newly proposed for a possible silicon realization of a mutual inductor, with which an instant large current in the power line is half-divided flowing through two different, but closely coupled, layers in opposite directions. This mutual inductance between two power layers enables us to significantly reduce the switching noise. SPICE simulations show that with a mutual coupling coefficient higher than 0.8, the switching noise reduces by 63% compared to the previously reported solutions. This DLPL technique can also be applied to PCB artworks.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.6
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• pp.404-410
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• 2021

This paper proposes a high step-up converter with zero-voltage transition (ZVT) cell for fuel cell electric vehicle. The proposed converter applies a ZVT cell to a dual floating output boost converter (DFOBC) so that not only the main switch but also the ZVT switch can achieve full-range soft switching. The current rating of the ZVT switch is 17% of the main switch. The proposed converter has high reliability in that no timing issue occurs. Therefore, online calculation is not required. The minimum turn-on time of the ZVT switch that guarantees soft switching at all loads and input/output voltage is obtained by analysis. In addition, the proposed DFOBC allows the use of a 650 V device even at 800 V output and has the advantage of being able to boost the voltage by 3.5 times with 0.56 duty. Planar coupled inductor with PCB winding was successfully implemented with the converter operated at 300 kHz. The 25 kW prototype achieves peak efficiency of 99% and power density of 63 kW/L.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.6
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• pp.406-410
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• 2019

Three-level (3L) DC-DC converters are appropriate for high-input-voltage applications. Although the voltage stress of TL converter switches can be reduced to half of the input voltage, the primary side has a large circulating current, which degrades efficiency. In this study, a dual half-bridge cascaded TL converter is presented to reduce this circulating current and thus decrease the conduction loss of the primary circuit. Moreover, the proposed converter can reduce the voltage stress of rectifier diodes, thereby reducing their conduction loss. Therefore, efficiency can be improved by reducing the conduction loss of the primary circuit and rectifier diodes.

• Journal of Power Electronics
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• v.14 no.5
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• pp.815-826
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• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.